Commit cb69d865 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'irq-core-2024-09-16' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull irq updates from Thomas Gleixner:
 "Core:

   - Remove a global lock in the affinity setting code

     The lock protects a cpumask for intermediate results and the lock
     causes a bottleneck on simultaneous start of multiple virtual
     machines. Replace the lock and the static cpumask with a per CPU
     cpumask which is nicely serialized by raw spinlock held when
     executing this code.

   - Provide support for giving a suffix to interrupt domain names.

     That's required to support devices with subfunctions so that the
     domain names are distinct even if they originate from the same
     device node.

   - The usual set of cleanups and enhancements all over the place

  Drivers:

   - Support for longarch AVEC interrupt chip

   - Refurbishment of the Armada driver so it can be extended for new
     variants.

   - The usual set of cleanups and enhancements all over the place"

* tag 'irq-core-2024-09-16' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (73 commits)
  genirq: Use cpumask_intersects()
  genirq/cpuhotplug: Use cpumask_intersects()
  irqchip/apple-aic: Only access system registers on SoCs which provide them
  irqchip/apple-aic: Add a new "Global fast IPIs only" feature level
  irqchip/apple-aic: Skip unnecessary enabling of use_fast_ipi
  dt-bindings: apple,aic: Document A7-A11 compatibles
  irqdomain: Use IS_ERR_OR_NULL() in irq_domain_trim_hierarchy()
  genirq/msi: Use kmemdup_array() instead of kmemdup()
  genirq/proc: Change the return value for set affinity permission error
  genirq/proc: Use irq_move_pending() in show_irq_affinity()
  genirq/proc: Correctly set file permissions for affinity control files
  genirq: Get rid of global lock in irq_do_set_affinity()
  genirq: Fix typo in struct comment
  irqchip/loongarch-avec: Add AVEC irqchip support
  irqchip/loongson-pch-msi: Prepare get_pch_msi_handle() for AVECINTC
  irqchip/loongson-eiointc: Rename CPUHP_AP_IRQ_LOONGARCH_STARTING
  LoongArch: Architectural preparation for AVEC irqchip
  LoongArch: Move irqchip function prototypes to irq-loongson.h
  irqchip/loongson-pch-msi: Switch to MSI parent domains
  softirq: Remove unused 'action' parameter from action callback
  ...
parents a64405b7 a6fe30d1

Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml

+13 −1
Original line number Diff line number Diff line
@@ -31,13 +31,25 @@ description: | 
  This device also represents the FIQ interrupt sources on platforms using AIC,

  which do not go through a discrete interrupt controller.



  IPIs may be performed via MMIO registers on all variants of AIC. Starting

  from A11, system registers may also be used for "fast" IPIs. Starting from

  M1, even faster IPIs within the same cluster may be achieved by writing to

  a "local" fast IPI register as opposed to using the "global" fast IPI

  register.



allOf:

  - $ref: /schemas/interrupt-controller.yaml#



properties:

  compatible:

    items:

      - const: apple,t8103-aic

      - enum:

          - apple,s5l8960x-aic

          - apple,t7000-aic

          - apple,s8000-aic

          - apple,t8010-aic

          - apple,t8015-aic

          - apple,t8103-aic

      - const: apple,aic



  interrupt-controller: true

arch/loongarch/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -85,6 +85,7 @@ config LOONGARCH 
	select GENERIC_ENTRY

	select GENERIC_GETTIMEOFDAY

	select GENERIC_IOREMAP if !ARCH_IOREMAP

	select GENERIC_IRQ_MATRIX_ALLOCATOR

	select GENERIC_IRQ_MULTI_HANDLER

	select GENERIC_IRQ_PROBE

	select GENERIC_IRQ_SHOW

arch/loongarch/include/asm/cpu-features.h

+1 −0
Original line number Diff line number Diff line
@@ -65,5 +65,6 @@ 
#define cpu_has_guestid		cpu_opt(LOONGARCH_CPU_GUESTID)

#define cpu_has_hypervisor	cpu_opt(LOONGARCH_CPU_HYPERVISOR)

#define cpu_has_ptw		cpu_opt(LOONGARCH_CPU_PTW)

#define cpu_has_avecint		cpu_opt(LOONGARCH_CPU_AVECINT)



#endif /* __ASM_CPU_FEATURES_H */

arch/loongarch/include/asm/cpu.h

+2 −0
Original line number Diff line number Diff line
@@ -99,6 +99,7 @@ enum cpu_type_enum { 
#define CPU_FEATURE_GUESTID		24	/* CPU has GuestID feature */

#define CPU_FEATURE_HYPERVISOR		25	/* CPU has hypervisor (running in VM) */

#define CPU_FEATURE_PTW			26	/* CPU has hardware page table walker */

#define CPU_FEATURE_AVECINT		27	/* CPU has avec interrupt */



#define LOONGARCH_CPU_CPUCFG		BIT_ULL(CPU_FEATURE_CPUCFG)

#define LOONGARCH_CPU_LAM		BIT_ULL(CPU_FEATURE_LAM)
@@ -127,5 +128,6 @@ enum cpu_type_enum { 
#define LOONGARCH_CPU_GUESTID		BIT_ULL(CPU_FEATURE_GUESTID)

#define LOONGARCH_CPU_HYPERVISOR	BIT_ULL(CPU_FEATURE_HYPERVISOR)

#define LOONGARCH_CPU_PTW		BIT_ULL(CPU_FEATURE_PTW)

#define LOONGARCH_CPU_AVECINT		BIT_ULL(CPU_FEATURE_AVECINT)



#endif /* _ASM_CPU_H */

arch/loongarch/include/asm/hardirq.h

+2 −1
Original line number Diff line number Diff line
@@ -12,12 +12,13 @@ 
extern void ack_bad_irq(unsigned int irq);

#define ack_bad_irq ack_bad_irq



#define NR_IPI	3

#define NR_IPI	4



enum ipi_msg_type {

	IPI_RESCHEDULE,

	IPI_CALL_FUNCTION,

	IPI_IRQ_WORK,

	IPI_CLEAR_VECTOR,

};



typedef struct {