Commit cb710329 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files


Cross-merge networking fixes after downstream PR (net-6.15-rc2).

Conflict:

Documentation/networking/netdevices.rst
net/core/lock_debug.c
  04efcee6 ("net: hold instance lock during NETDEV_CHANGE")
  03df156d ("xdp: double protect netdev->xdp_flags with netdev->lock")

No adjacent changes.

Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents a9843689 ab59a860
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+1 −0
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@@ -65,6 +65,7 @@ modules.order
/vmlinux.32
/vmlinux.map
/vmlinux.symvers
/vmlinux.unstripped
/vmlinux-gdb.py
/vmlinuz
/System.map
+18 −2
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@@ -4265,10 +4265,10 @@
	nosmp		[SMP,EARLY] Tells an SMP kernel to act as a UP kernel,
			and disable the IO APIC.  legacy for "maxcpus=0".

	nosmt		[KNL,MIPS,PPC,S390,EARLY] Disable symmetric multithreading (SMT).
	nosmt		[KNL,MIPS,PPC,EARLY] Disable symmetric multithreading (SMT).
			Equivalent to smt=1.

			[KNL,X86,PPC] Disable symmetric multithreading (SMT).
			[KNL,X86,PPC,S390] Disable symmetric multithreading (SMT).
			nosmt=force: Force disable SMT, cannot be undone
				     via the sysfs control file.

@@ -7535,6 +7535,22 @@
			Note that genuine overcurrent events won't be
			reported either.

	unaligned_scalar_speed=
			[RISCV]
			Format: {slow | fast | unsupported}
			Allow skipping scalar unaligned access speed tests. This
			is useful for testing alternative code paths and to skip
			the tests in environments where they run too slowly. All
			CPUs must have the same scalar unaligned access speed.

	unaligned_vector_speed=
			[RISCV]
			Format: {slow | fast | unsupported}
			Allow skipping vector unaligned access speed tests. This
			is useful for testing alternative code paths and to skip
			the tests in environments where they run too slowly. All
			CPUs must have the same vector unaligned access speed.

	unknown_nmi_panic
			[X86] Cause panic on unknown NMI.

+32 −0
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@@ -183,6 +183,9 @@ The following keys are defined:
       defined in the Atomic Compare-and-Swap (CAS) instructions manual starting
       from commit 5059e0ca641c ("update to ratified").

  * :c:macro:`RISCV_HWPROBE_EXT_ZICNTR`: The Zicntr extension version 2.0
       is supported as defined in the RISC-V ISA manual.

  * :c:macro:`RISCV_HWPROBE_EXT_ZICOND`: The Zicond extension is supported as
       defined in the RISC-V Integer Conditional (Zicond) operations extension
       manual starting from commit 95cf1f9 ("Add changes requested by Ved
@@ -192,6 +195,9 @@ The following keys are defined:
       supported as defined in the RISC-V ISA manual starting from commit
       d8ab5c78c207 ("Zihintpause is ratified").

  * :c:macro:`RISCV_HWPROBE_EXT_ZIHPM`: The Zihpm extension version 2.0
       is supported as defined in the RISC-V ISA manual.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVE32X`: The Vector sub-extension Zve32x is
    supported, as defined by version 1.0 of the RISC-V Vector extension manual.

@@ -239,9 +245,32 @@ The following keys are defined:
       ratified in commit 98918c844281 ("Merge pull request #1217 from
       riscv/zawrs") of riscv-isa-manual.

  * :c:macro:`RISCV_HWPROBE_EXT_ZAAMO`: The Zaamo extension is supported as
       defined in the in the RISC-V ISA manual starting from commit e87412e621f1
       ("integrate Zaamo and Zalrsc text (#1304)").

  * :c:macro:`RISCV_HWPROBE_EXT_ZALRSC`: The Zalrsc extension is supported as
       defined in the in the RISC-V ISA manual starting from commit e87412e621f1
       ("integrate Zaamo and Zalrsc text (#1304)").

  * :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as
       defined in version 1.0 of the RISC-V Pointer Masking extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZFBFMIN`: The Zfbfmin extension is supported as
       defined in the RISC-V ISA manual starting from commit 4dc23d6229de
       ("Added Chapter title to BF16").

  * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFMIN`: The Zvfbfmin extension is supported as
       defined in the RISC-V ISA manual starting from commit 4dc23d6229de
       ("Added Chapter title to BF16").

  * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFWMA`: The Zvfbfwma extension is supported as
       defined in the RISC-V ISA manual starting from commit 4dc23d6229de
       ("Added Chapter title to BF16").

  * :c:macro:`RISCV_HWPROBE_EXT_ZICBOM`: The Zicbom extension is supported, as
       ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.

* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated.  Returns similar values to
     :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
     mistakenly classified as a bitmask rather than a value.
@@ -303,3 +332,6 @@ The following keys are defined:
    * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR`: The xtheadvector vendor
        extension is supported in the T-Head ISA extensions spec starting from
	commit a18c801634 ("Add T-Head VECTOR vendor extension. ").

* :c:macro:`RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE`: An unsigned int which
  represents the size of the Zicbom block in bytes.
+0 −18
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@@ -342,24 +342,6 @@ API usage

    See: https://www.kernel.org/doc/html/latest/RCU/whatisRCU.html#full-list-of-rcu-apis

  **DEPRECATED_VARIABLE**
    EXTRA_{A,C,CPP,LD}FLAGS are deprecated and should be replaced by the new
    flags added via commit f77bf01425b1 ("kbuild: introduce ccflags-y,
    asflags-y and ldflags-y").

    The following conversion scheme maybe used::

      EXTRA_AFLAGS    ->  asflags-y
      EXTRA_CFLAGS    ->  ccflags-y
      EXTRA_CPPFLAGS  ->  cppflags-y
      EXTRA_LDFLAGS   ->  ldflags-y

    See:

      1. https://lore.kernel.org/lkml/20070930191054.GA15876@uranus.ravnborg.org/
      2. https://lore.kernel.org/lkml/1313384834-24433-12-git-send-email-lacombar@gmail.com/
      3. https://www.kernel.org/doc/html/latest/kbuild/makefiles.html#compilation-flags

  **DEVICE_ATTR_FUNCTIONS**
    The function names used in DEVICE_ATTR is unusual.
    Typically, the store and show functions are used with <attr>_store and
+0 −49
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* GPIO driven matrix keypad device tree bindings

GPIO driven matrix keypad is used to interface a SoC with a matrix keypad.
The matrix keypad supports multiple row and column lines, a key can be
placed at each intersection of a unique row and a unique column. The matrix
keypad can sense a key-press and key-release by means of GPIO lines and
report the event using GPIO interrupts to the cpu.

Required Properties:
- compatible:		Should be "gpio-matrix-keypad"
- row-gpios:		List of gpios used as row lines. The gpio specifier
			for this property depends on the gpio controller to
			which these row lines are connected.
- col-gpios:		List of gpios used as column lines. The gpio specifier
			for this property depends on the gpio controller to
			which these column lines are connected.
- linux,keymap:		The definition can be found at
			bindings/input/matrix-keymap.txt

Optional Properties:
- linux,no-autorepeat:	do no enable autorepeat feature.
- wakeup-source:	use any event on keypad as wakeup event.
			(Legacy property supported: "linux,wakeup")
- debounce-delay-ms:	debounce interval in milliseconds
- col-scan-delay-us:	delay, measured in microseconds, that is needed
			before we can scan keypad after activating column gpio
- drive-inactive-cols:	drive inactive columns during scan,
			default is to turn inactive columns into inputs.

Example:
	matrix-keypad {
		compatible = "gpio-matrix-keypad";
		debounce-delay-ms = <5>;
		col-scan-delay-us = <2>;

		row-gpios = <&gpio2 25 0
			     &gpio2 26 0
			     &gpio2 27 0>;

		col-gpios = <&gpio2 21 0
			     &gpio2 22 0>;

		linux,keymap = <0x0000008B
				0x0100009E
				0x02000069
				0x0001006A
				0x0101001C
				0x0201006C>;
	};
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