Commit cba38d12 authored by Tariq Toukan's avatar Tariq Toukan Committed by Jakub Kicinski
Browse files

net/mlx5e: Always select CONFIG_PAGE_POOL_STATS 



Always set PAGE_POOL_STATS in mlx5 Eth driver.
Cleanup the corresponding #ifdefs.

Page pool stats are essential to monitor and analyze RX performance.

Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Reviewed-by: default avatarGal Pressman <gal@nvidia.com>
Link: https://patch.msgid.link/1742412199-159596-4-git-send-email-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent cac48eb6

drivers/net/ethernet/mellanox/mlx5/core/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ config MLX5_CORE_EN 
	bool "Mellanox 5th generation network adapters (ConnectX series) Ethernet support"

	depends on NETDEVICES && ETHERNET && INET && PCI && MLX5_CORE

	select PAGE_POOL

	select PAGE_POOL_STATS

	select DIMLIB

	help

	  Ethernet support in Mellanox Technologies ConnectX-4 NIC.

drivers/net/ethernet/mellanox/mlx5/core/en_stats.c

+0 −14
Original line number Diff line number Diff line
@@ -37,9 +37,7 @@ 
#include "en/ptp.h"

#include "en/port.h"



#ifdef CONFIG_PAGE_POOL_STATS

#include <net/page_pool/helpers.h>

#endif



void mlx5e_ethtool_put_stat(u64 **data, u64 val)

{
@@ -196,7 +194,6 @@ static const struct counter_desc sw_stats_desc[] = { 
	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_arfs_err) },

#endif

	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_recover) },

#ifdef CONFIG_PAGE_POOL_STATS

	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_fast) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_slow) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_slow_high_order) },
@@ -208,7 +205,6 @@ static const struct counter_desc sw_stats_desc[] = { 
	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_ring) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_ring_full) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_released_ref) },

#endif

#ifdef CONFIG_MLX5_EN_TLS

	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_decrypted_packets) },

	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_decrypted_bytes) },
@@ -377,7 +373,6 @@ static void mlx5e_stats_grp_sw_update_stats_rq_stats(struct mlx5e_sw_stats *s, 
	s->rx_arfs_err                += rq_stats->arfs_err;

#endif

	s->rx_recover                 += rq_stats->recover;

#ifdef CONFIG_PAGE_POOL_STATS

	s->rx_pp_alloc_fast          += rq_stats->pp_alloc_fast;

	s->rx_pp_alloc_slow          += rq_stats->pp_alloc_slow;

	s->rx_pp_alloc_empty         += rq_stats->pp_alloc_empty;
@@ -389,7 +384,6 @@ static void mlx5e_stats_grp_sw_update_stats_rq_stats(struct mlx5e_sw_stats *s, 
	s->rx_pp_recycle_ring			+= rq_stats->pp_recycle_ring;

	s->rx_pp_recycle_ring_full		+= rq_stats->pp_recycle_ring_full;

	s->rx_pp_recycle_released_ref		+= rq_stats->pp_recycle_released_ref;

#endif

#ifdef CONFIG_MLX5_EN_TLS

	s->rx_tls_decrypted_packets   += rq_stats->tls_decrypted_packets;

	s->rx_tls_decrypted_bytes     += rq_stats->tls_decrypted_bytes;
@@ -496,7 +490,6 @@ static void mlx5e_stats_grp_sw_update_stats_qos(struct mlx5e_priv *priv, 
	}

}



#ifdef CONFIG_PAGE_POOL_STATS

static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c)

{

	struct mlx5e_rq_stats *rq_stats = c->rq.stats;
@@ -519,11 +512,6 @@ static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c) 
	rq_stats->pp_recycle_ring_full = stats.recycle_stats.ring_full;

	rq_stats->pp_recycle_released_ref = stats.recycle_stats.released_refcnt;

}

#else

static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c)

{

}

#endif



static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(sw)

{
@@ -2131,7 +2119,6 @@ static const struct counter_desc rq_stats_desc[] = { 
	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, arfs_err) },

#endif

	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, recover) },

#ifdef CONFIG_PAGE_POOL_STATS

	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_fast) },

	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_slow) },

	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_slow_high_order) },
@@ -2143,7 +2130,6 @@ static const struct counter_desc rq_stats_desc[] = { 
	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_ring) },

	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_ring_full) },

	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_released_ref) },

#endif

#ifdef CONFIG_MLX5_EN_TLS

	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_decrypted_packets) },

	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_decrypted_bytes) },

drivers/net/ethernet/mellanox/mlx5/core/en_stats.h

+0 −4
Original line number Diff line number Diff line
@@ -215,7 +215,6 @@ struct mlx5e_sw_stats { 
	u64 ch_aff_change;

	u64 ch_force_irq;

	u64 ch_eq_rearm;

#ifdef CONFIG_PAGE_POOL_STATS

	u64 rx_pp_alloc_fast;

	u64 rx_pp_alloc_slow;

	u64 rx_pp_alloc_slow_high_order;
@@ -227,7 +226,6 @@ struct mlx5e_sw_stats { 
	u64 rx_pp_recycle_ring;

	u64 rx_pp_recycle_ring_full;

	u64 rx_pp_recycle_released_ref;

#endif

#ifdef CONFIG_MLX5_EN_TLS

	u64 tx_tls_encrypted_packets;

	u64 tx_tls_encrypted_bytes;
@@ -385,7 +383,6 @@ struct mlx5e_rq_stats { 
	u64 arfs_err;

#endif

	u64 recover;

#ifdef CONFIG_PAGE_POOL_STATS

	u64 pp_alloc_fast;

	u64 pp_alloc_slow;

	u64 pp_alloc_slow_high_order;
@@ -397,7 +394,6 @@ struct mlx5e_rq_stats { 
	u64 pp_recycle_ring;

	u64 pp_recycle_ring_full;

	u64 pp_recycle_released_ref;

#endif

#ifdef CONFIG_MLX5_EN_TLS

	u64 tls_decrypted_packets;

	u64 tls_decrypted_bytes;