Loading arch/mips/boot/dts/qca/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -4,4 +4,5 @@ dtb-$(CONFIG_ATH79) += ar9132_tl_wr1043nd_v1.dtb dtb-$(CONFIG_ATH79) += ar9331_dpt_module.dtb dtb-$(CONFIG_ATH79) += ar9331_dragino_ms14.dtb dtb-$(CONFIG_ATH79) += ar9331_omega.dtb dtb-$(CONFIG_ATH79) += ar9331_openembed_som9331_board.dtb dtb-$(CONFIG_ATH79) += ar9331_tl_mr3020.dtb arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts 0 → 100644 +110 −0 Original line number Diff line number Diff line // SPDX-License-Identifier: (GPL-2.0 OR MIT) /dts-v1/; #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> #include "ar9331.dtsi" / { model = "OpenEmbed SOM9331 Board"; compatible = "openembed,som9331"; aliases { serial0 = &uart; }; memory@0 { device_type = "memory"; reg = <0x0 0x4000000>; }; leds { compatible = "gpio-leds"; led-0 { function = LED_FUNCTION_STATUS; color = <LED_COLOR_ID_RED>; gpios = <&gpio 27 GPIO_ACTIVE_LOW>; default-state = "off"; }; }; gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; button@0 { label = "reset"; linux,code = <KEY_RESTART>; gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; }; }; }; &ref { clock-frequency = <25000000>; }; &uart { status = "okay"; }; &gpio { status = "okay"; }; &usb { dr_mode = "host"; status = "okay"; }; &usb_phy { status = "okay"; }; &spi { num-chipselects = <1>; status = "okay"; /* Winbond 25Q64FVSIG SPI flash */ spiflash: w25q64@0 { #address-cells = <1>; #size-cells = <1>; compatible = "winbond,w25q64", "jedec,spi-nor"; spi-max-frequency = <104000000>; reg = <0>; }; }; ð0 { status = "okay"; }; ð1 { status = "okay"; }; &switch_port1 { label = "lan0"; status = "okay"; }; &switch_port3 { label = "lan1"; status = "okay"; }; &phy_port0 { status = "okay"; }; &phy_port2 { status = "okay"; }; &phy_port4 { status = "okay"; }; Loading
arch/mips/boot/dts/qca/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -4,4 +4,5 @@ dtb-$(CONFIG_ATH79) += ar9132_tl_wr1043nd_v1.dtb dtb-$(CONFIG_ATH79) += ar9331_dpt_module.dtb dtb-$(CONFIG_ATH79) += ar9331_dragino_ms14.dtb dtb-$(CONFIG_ATH79) += ar9331_omega.dtb dtb-$(CONFIG_ATH79) += ar9331_openembed_som9331_board.dtb dtb-$(CONFIG_ATH79) += ar9331_tl_mr3020.dtb
arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts 0 → 100644 +110 −0 Original line number Diff line number Diff line // SPDX-License-Identifier: (GPL-2.0 OR MIT) /dts-v1/; #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> #include "ar9331.dtsi" / { model = "OpenEmbed SOM9331 Board"; compatible = "openembed,som9331"; aliases { serial0 = &uart; }; memory@0 { device_type = "memory"; reg = <0x0 0x4000000>; }; leds { compatible = "gpio-leds"; led-0 { function = LED_FUNCTION_STATUS; color = <LED_COLOR_ID_RED>; gpios = <&gpio 27 GPIO_ACTIVE_LOW>; default-state = "off"; }; }; gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; button@0 { label = "reset"; linux,code = <KEY_RESTART>; gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; }; }; }; &ref { clock-frequency = <25000000>; }; &uart { status = "okay"; }; &gpio { status = "okay"; }; &usb { dr_mode = "host"; status = "okay"; }; &usb_phy { status = "okay"; }; &spi { num-chipselects = <1>; status = "okay"; /* Winbond 25Q64FVSIG SPI flash */ spiflash: w25q64@0 { #address-cells = <1>; #size-cells = <1>; compatible = "winbond,w25q64", "jedec,spi-nor"; spi-max-frequency = <104000000>; reg = <0>; }; }; ð0 { status = "okay"; }; ð1 { status = "okay"; }; &switch_port1 { label = "lan0"; status = "okay"; }; &switch_port3 { label = "lan1"; status = "okay"; }; &phy_port0 { status = "okay"; }; &phy_port2 { status = "okay"; }; &phy_port4 { status = "okay"; };