Commit cc370ff8 authored by Akhil R's avatar Akhil R Committed by Herbert Xu
Browse files

gpu: host1x: Add Tegra SE to SID table 



Add Tegra Security Engine details to the SID table in host1x driver.
These entries are required to be in place to configure the stream ID
for SE. Register writes to stream ID registers fail otherwise.

Signed-off-by: default avatarAkhil R <akhilrajeev@nvidia.com>
Acked-by: default avatarMikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 17048b22

drivers/gpu/host1x/dev.c

+24 −0
Original line number Diff line number Diff line
@@ -215,6 +215,30 @@ static const struct host1x_info host1x07_info = { 
 * and firmware stream ID in the MMIO path table.

 */

static const struct host1x_sid_entry tegra234_sid_table[] = {

	{

		/* SE2 MMIO */

		.base = 0x1658,

		.offset = 0x90,

		.limit = 0x90

	},

	{

		/* SE4 MMIO */

		.base = 0x1660,

		.offset = 0x90,

		.limit = 0x90

	},

	{

		/* SE2 channel */

		.base = 0x1738,

		.offset = 0x90,

		.limit = 0x90

	},

	{

		/* SE4 channel */

		.base = 0x1740,

		.offset = 0x90,

		.limit = 0x90

	},

	{

		/* VIC channel */

		.base = 0x17b8,