ASoC: dt-bindings: Add Rockchip RK3308 internal audio codec

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/sound/rockchip,rk3308-codec.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip RK3308 Internal Codec

description: |

  This is the audio codec embedded in the Rockchip RK3308

  SoC. It has 8 24-bit ADCs and 2 24-bit DACs. The maximum supported

  sampling rate is 192 kHz.

  It is connected internally to one out of a selection of the internal I2S

  controllers.

  The RK3308 audio codec has 8 independent capture channels, but some

  features work on stereo pairs called groups:

    * grp 0 -- MIC1 / MIC2

    * grp 1 -- MIC3 / MIC4

    * grp 2 -- MIC5 / MIC6

    * grp 3 -- MIC7 / MIC8

maintainers:

  - Luca Ceresoli <luca.ceresoli@bootlin.com>

properties:

  compatible:

    const: rockchip,rk3308-codec

  reg:

    maxItems: 1

  rockchip,grf:

    $ref: /schemas/types.yaml#/definitions/phandle

    description:

      Phandle to the General Register Files (GRF)

  clocks:

    items:

      - description: clock for TX

      - description: clock for RX

      - description: AHB clock driving the interface

  clock-names:

    items:

      - const: mclk_tx

      - const: mclk_rx

      - const: hclk

  resets:

    maxItems: 1

  reset-names:

    items:

      - const: codec

  "#sound-dai-cells":

    const: 0

  rockchip,micbias-avdd-percent:

    description: |

      Voltage setting for the MICBIAS pins expressed as a percentage of

      AVDD.

      E.g. if rockchip,micbias-avdd-percent = 85 and AVDD = 3v3, then the

      MIC BIAS voltage will be 3.3 V * 85% = 2.805 V.

    enum: [ 50, 55, 60, 65, 70, 75, 80, 85 ]

required:

  - compatible

  - reg

  - rockchip,grf

  - clocks

  - resets

  - "#sound-dai-cells"

additionalProperties: false

examples:

  - |

    #include <dt-bindings/clock/rk3308-cru.h>

    audio_codec: audio-codec@ff560000 {

        compatible = "rockchip,rk3308-codec";

        reg = <0xff560000 0x10000>;

        rockchip,grf = <&grf>;

        clock-names = "mclk_tx", "mclk_rx", "hclk";

        clocks = <&cru SCLK_I2S2_8CH_TX_OUT>,

                 <&cru SCLK_I2S2_8CH_RX_OUT>,

                 <&cru PCLK_ACODEC>;

        reset-names = "codec";

        resets = <&cru SRST_ACODEC_P>;

        #sound-dai-cells = <0>;

    };

...

F:	Documentation/devicetree/bindings/media/rockchip-rga.yaml

F:	drivers/media/platform/rockchip/rga/

ROCKCHIP RK3308 INTERNAL AUDIO CODEC

M:	Luca Ceresoli <luca.ceresoli@bootlin.com>

S:	Maintained

F:	Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml

ROCKCHIP VIDEO DECODER DRIVER

M:	Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

L:	linux-media@vger.kernel.org