Commit cd02e4b6 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Bjorn Helgaas
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PCI: dwc: Add outbound MSG TLPs support 

Add "code" and "routing" into struct dw_pcie_ob_atu_cfg for triggering
INTx IRQs by iATU in the PCIe endpoint mode in near the future.
PCIE_ATU_INHIBIT_PAYLOAD is set to issue TLP type of Msg instead of
MsgD. This implementation supports the data-less messages only for now.

Link: https://lore.kernel.org/linux-pci/20240418-pme_msg-v8-3-a54265c39742@nxp.com


Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarSerge Semin <fancer.lancer@gmail.com>
parent aa85ef61

drivers/pci/controller/dwc/pcie-designware.c

+7 −2
Original line number Diff line number Diff line
@@ -499,7 +499,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, 
	dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET,

			      upper_32_bits(atu->pci_addr));



	val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no);

	val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no);

	if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) &&

	    dw_pcie_ver_is_ge(pci, 460A))

		val |= PCIE_ATU_INCREASE_REGION_SIZE;
@@ -507,7 +507,12 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, 
		val = dw_pcie_enable_ecrc(val);

	dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val);



	dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE);

	val = PCIE_ATU_ENABLE;

	if (atu->type == PCIE_ATU_TYPE_MSG) {

		/* The data-less messages only for now */

		val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code;

	}

	dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val);



	/*

	 * Make sure ATU enable takes effect before any subsequent config

drivers/pci/controller/dwc/pcie-designware.h

+4 −0
Original line number Diff line number Diff line
@@ -147,11 +147,13 @@ 
#define PCIE_ATU_TYPE_IO		0x2

#define PCIE_ATU_TYPE_CFG0		0x4

#define PCIE_ATU_TYPE_CFG1		0x5

#define PCIE_ATU_TYPE_MSG		0x10

#define PCIE_ATU_TD			BIT(8)

#define PCIE_ATU_FUNC_NUM(pf)           ((pf) << 20)

#define PCIE_ATU_REGION_CTRL2		0x004

#define PCIE_ATU_ENABLE			BIT(31)

#define PCIE_ATU_BAR_MODE_ENABLE	BIT(30)

#define PCIE_ATU_INHIBIT_PAYLOAD	BIT(22)

#define PCIE_ATU_FUNC_NUM_MATCH_EN      BIT(19)

#define PCIE_ATU_LOWER_BASE		0x008

#define PCIE_ATU_UPPER_BASE		0x00C
@@ -302,6 +304,8 @@ struct dw_pcie_ob_atu_cfg { 
	int index;

	int type;

	u8 func_no;

	u8 code;

	u8 routing;

	u64 cpu_addr;

	u64 pci_addr;

	u64 size;