Commit cd86437c authored by Rob Herring (Arm)'s avatar Rob Herring (Arm) Committed by Stephen Boyd
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dt-bindings: clock: mediatek: Convert MediaTek clock syscons to schema 



Convert the various MediaTek syscon bindings which are a clock provider
into DT schema format. As they are all the same other than compatible
string, combine them into a single schema file.

Signed-off-by: default avatarRob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240807-dt-mediatek-clk-v1-3-e8d568abfd48@kernel.org


Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent c1a9a21f

Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt

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Mediatek bdpsys controller

============================



The Mediatek bdpsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be:

	- "mediatek,mt2701-bdpsys", "syscon"

	- "mediatek,mt2712-bdpsys", "syscon"

	- "mediatek,mt7623-bdpsys", "mediatek,mt2701-bdpsys", "syscon"

- #clock-cells: Must be 1



The bdpsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



bdpsys: clock-controller@1c000000 {

	compatible = "mediatek,mt2701-bdpsys", "syscon";

	reg = <0 0x1c000000 0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt

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MediaTek CAMSYS controller

============================



The MediaTek camsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt6765-camsys", "syscon"

	- "mediatek,mt6779-camsys", "syscon"

	- "mediatek,mt8183-camsys", "syscon"

- #clock-cells: Must be 1



The camsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



camsys: camsys@1a000000  {

	compatible = "mediatek,mt8183-camsys", "syscon";

	reg = <0 0x1a000000  0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt

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Mediatek imgsys controller

============================



The Mediatek imgsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt2701-imgsys", "syscon"

	- "mediatek,mt2712-imgsys", "syscon"

	- "mediatek,mt6765-imgsys", "syscon"

	- "mediatek,mt6779-imgsys", "syscon"

	- "mediatek,mt6797-imgsys", "syscon"

	- "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"

	- "mediatek,mt8167-imgsys", "syscon"

	- "mediatek,mt8173-imgsys", "syscon"

	- "mediatek,mt8183-imgsys", "syscon"

- #clock-cells: Must be 1



The imgsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



imgsys: clock-controller@15000000 {

	compatible = "mediatek,mt8173-imgsys", "syscon";

	reg = <0 0x15000000 0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt

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Mediatek ipesys controller

============================



The Mediatek ipesys controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt6779-ipesys", "syscon"

- #clock-cells: Must be 1



The ipesys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



ipesys: clock-controller@1b000000 {

	compatible = "mediatek,mt6779-ipesys", "syscon";

	reg = <0 0x1b000000 0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,ipu.txt

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Mediatek IPU controller

============================



The Mediatek ipu controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt8183-ipu_conn", "syscon"

	- "mediatek,mt8183-ipu_adl", "syscon"

	- "mediatek,mt8183-ipu_core0", "syscon"

	- "mediatek,mt8183-ipu_core1", "syscon"

- #clock-cells: Must be 1



The ipu controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



ipu_conn: syscon@19000000 {

	compatible = "mediatek,mt8183-ipu_conn", "syscon";

	reg = <0 0x19000000 0 0x1000>;

	#clock-cells = <1>;

};



ipu_adl: syscon@19010000 {

	compatible = "mediatek,mt8183-ipu_adl", "syscon";

	reg = <0 0x19010000 0 0x1000>;

	#clock-cells = <1>;

};



ipu_core0: syscon@19180000 {

	compatible = "mediatek,mt8183-ipu_core0", "syscon";

	reg = <0 0x19180000 0 0x1000>;

	#clock-cells = <1>;

};



ipu_core1: syscon@19280000 {

	compatible = "mediatek,mt8183-ipu_core1", "syscon";

	reg = <0 0x19280000 0 0x1000>;

	#clock-cells = <1>;

};