Commit cdb2511b authored by Inochi Amaoto's avatar Inochi Amaoto Committed by Vinod Koul
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dt-bindings: phy: Add Sophgo CV1800 USB phy 



The USB phy of Sophgo CV18XX series SoC needs to sense a pin called
"VBUS_DET" to get the right operation mode. If this pin is not
connected, it only supports setting the mode manually.

Add USB phy bindings for Sophgo CV18XX/SG200X series SoC.

Signed-off-by: default avatarInochi Amaoto <inochiama@gmail.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250708063038.497473-2-inochiama@gmail.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 2c27aaee

Documentation/devicetree/bindings/phy/sophgo,cv1800b-usb2-phy.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/sophgo,cv1800b-usb2-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Sophgo CV18XX/SG200X USB 2.0 PHY



maintainers:

  - Inochi Amaoto <inochiama@gmail.com>



properties:

  compatible:

    const: sophgo,cv1800b-usb2-phy



  reg:

    maxItems: 1



  "#phy-cells":

    const: 0



  clocks:

    items:

      - description: PHY app clock

      - description: PHY stb clock

      - description: PHY lpm clock



  clock-names:

    items:

      - const: app

      - const: stb

      - const: lpm



  resets:

    maxItems: 1



required:

  - compatible

  - "#phy-cells"

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    phy@48 {

      compatible = "sophgo,cv1800b-usb2-phy";

      reg = <0x48 0x4>;

      #phy-cells = <0>;

      clocks = <&clk 93>, <&clk 94>, <&clk 95>;

      clock-names = "app", "stb", "lpm";

      resets = <&rst 58>;

    };