Commit ce25e2a8 authored by Krishna Kurapati's avatar Krishna Kurapati Committed by Greg Kroah-Hartman
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usb: dwc3: core: Set force_gen1 bit for all applicable SuperSpeed ports 



Currently if the maximum-speed is set to Super Speed for a 3.1 Gen2
capable controller, the FORCE_GEN1 bit of LLUCTL register is set only
for one SuperSpeed port (or the first port) present. Modify the logic
to set the FORCE_GEN1 bit for all ports if speed is being limited to
Gen-1.

Suggested-by: default avatarThinh Nguyen <Thinh.Nguyen@synopsys.com>
Signed-off-by: default avatarKrishna Kurapati <quic_kriskura@quicinc.com>
Acked-by: default avatarThinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/20241112182018.199392-1-quic_kriskura@quicinc.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 61eb055c

drivers/usb/dwc3/core.c

+7 −3
Original line number Diff line number Diff line
@@ -1470,9 +1470,13 @@ static int dwc3_core_init(struct dwc3 *dwc) 
	if (hw_mode != DWC3_GHWPARAMS0_MODE_GADGET &&

	    (DWC3_IP_IS(DWC31)) &&

	    dwc->maximum_speed == USB_SPEED_SUPER) {

		reg = dwc3_readl(dwc->regs, DWC3_LLUCTL);

		int i;



		for (i = 0; i < dwc->num_usb3_ports; i++) {

			reg = dwc3_readl(dwc->regs, DWC3_LLUCTL(i));

			reg |= DWC3_LLUCTL_FORCE_GEN1;

		dwc3_writel(dwc->regs, DWC3_LLUCTL, reg);

			dwc3_writel(dwc->regs, DWC3_LLUCTL(i), reg);

		}

	}



	return 0;

drivers/usb/dwc3/core.h

+1 −1
Original line number Diff line number Diff line
@@ -179,7 +179,7 @@ 
#define DWC3_OEVTEN		0xcc0C

#define DWC3_OSTS		0xcc10



#define DWC3_LLUCTL		0xd024

#define DWC3_LLUCTL(n)		(0xd024 + ((n) * 0x80))



/* Bit fields */