Commit ce4941c2 authored by Chaitanya Kumar Borah's avatar Chaitanya Kumar Borah Committed by Jani Nikula
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drm/i915/mtl: Support HBR3 rate with C10 phy and eDP in MTL 



eDP specification supports HBR3 link rate since v1.4a. Moreover,
C10 phy can support HBR3 link rate for both DP and eDP. Therefore,
do not clamp the supported rates for eDP at 6.75Gbps.

Cc: <stable@vger.kernel.org>

BSpec: 70073 74224

Signed-off-by: default avatarChaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
Signed-off-by: default avatarMika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018113622.2761997-1-chaitanya.kumar.borah@intel.com


(cherry picked from commit a3431650)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 7d7a328d

drivers/gpu/drm/i915/display/intel_dp.c

+1 −1
Original line number Diff line number Diff line
@@ -430,7 +430,7 @@ static int mtl_max_source_rate(struct intel_dp *intel_dp) 
	enum phy phy = intel_port_to_phy(i915, dig_port->base.port);



	if (intel_is_c10phy(i915, phy))

		return intel_dp_is_edp(intel_dp) ? 675000 : 810000;

		return 810000;



	return 2000000;

}