Unverified Commit ce7743bc authored Apr 16, 2025 by Nitin Gote Committed by Rodrigo Vivi Apr 29, 2025

drm/i915/gt: Add delay to let engine resumes properly

Sometimes engine reset fails because the engine resumes from an
incorrect RING_HEAD. Engine head failed to set to zero even after
writing into it. This is a timing issue and we experimented
different values and found out that 20ms delay works best based
on testing.

So, add a 20ms delay to let engine resumes from correct RING_HEAD.

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13968


Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com>
Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com>
Link: https://lore.kernel.org/r/20250416103640.212269-1-nitin.r.gote@intel.com


Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

parent 795dbde9

drivers/gpu/drm/i915/gt/intel_ring_submission.c

+7 −1

Original line number	Diff line number	Diff line
		@@ -365,7 +365,13 @@ static void reset_prepare(struct intel_engine_cs *engine)
		ENGINE_READ_FW(engine, RING_HEAD),
		ENGINE_READ_FW(engine, RING_TAIL),
		ENGINE_READ_FW(engine, RING_START));
		if (!stop_ring(engine)) {
		/*
		* Sometimes engine head failed to set to zero even after writing into it.
		* Use wait_for_atomic() with 20ms delay to let engine resumes from
		* correct RING_HEAD. Experimented different values and determined
		* that 20ms works best based on testing.
		*/
		if (wait_for_atomic((!stop_ring(engine) == 0), 20)) {
		drm_err(&engine->i915->drm,
		"failed to set %s head to zero "
		"ctl %08x head %08x tail %08x start %08x\n",