Commit cf141287 authored by Akshay Gupta's avatar Akshay Gupta Committed by Greg Kroah-Hartman
Browse files

misc: amd-sbi: Add support for register xfer 



- Provide user register access over IOCTL.
  Both register read and write are supported.
- APML interface does not provide a synchronization method. By defining,
  a register access path, we use APML modules and library for
  all APML transactions. Without having to use external tools such as
  i2c-tools, which may cause race conditions.

Reviewed-by: default avatarNaveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: default avatarAkshay Gupta <akshay.gupta@amd.com>
Link: https://lore.kernel.org/r/20250428063034.2145566-10-akshay.gupta@amd.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 69b1ba83

drivers/misc/amd-sbi/rmi-core.c

+29 −0
Original line number Diff line number Diff line
@@ -350,6 +350,33 @@ int rmi_mailbox_xfer(struct sbrmi_data *data, 
	return ret;

}



static int apml_rmi_reg_xfer(struct sbrmi_data *data,

			     struct apml_reg_xfer_msg __user *arg)

{

	struct apml_reg_xfer_msg msg = { 0 };

	unsigned int data_read;

	int ret;



	/* Copy the structure from user */

	if (copy_from_user(&msg, arg, sizeof(struct apml_reg_xfer_msg)))

		return -EFAULT;



	mutex_lock(&data->lock);

	if (msg.rflag) {

		ret = regmap_read(data->regmap, msg.reg_addr, &data_read);

		if (!ret)

			msg.data_in_out = data_read;

	} else {

		ret = regmap_write(data->regmap, msg.reg_addr, msg.data_in_out);

	}



	mutex_unlock(&data->lock);



	if (msg.rflag && !ret)

		return copy_to_user(arg, &msg, sizeof(struct apml_reg_xfer_msg));

	return ret;

}



static int apml_mailbox_xfer(struct sbrmi_data *data, struct apml_mbox_msg __user *arg)

{

	struct apml_mbox_msg msg = { 0 };
@@ -414,6 +441,8 @@ static long sbrmi_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) 
		return apml_cpuid_xfer(data, argp);

	case SBRMI_IOCTL_MCAMSR_CMD:

		return apml_mcamsr_xfer(data, argp);

	case SBRMI_IOCTL_REG_XFER_CMD:

		return apml_rmi_reg_xfer(data, argp);

	default:

		return -ENOTTY;

	}

include/uapi/misc/amd-apml.h

+31 −0
Original line number Diff line number Diff line
@@ -58,6 +58,21 @@ struct apml_mcamsr_msg { 
	__u32 pad;

};



struct apml_reg_xfer_msg {

	/*

	 * RMI register address offset

	 */

	__u16 reg_addr;

	/*

	 * Register data for read/write

	 */

	__u8 data_in_out;

	/*

	 * Register read or write

	 */

	__u8 rflag;

};



/*

 * AMD sideband interface base IOCTL

 */
@@ -118,4 +133,20 @@ struct apml_mcamsr_msg { 
 */

#define SBRMI_IOCTL_MCAMSR_CMD		_IOWR(SB_BASE_IOCTL_NR, 2, struct apml_mcamsr_msg)



/**

 * DOC: SBRMI_IOCTL_REG_XFER_CMD

 *

 * @Parameters

 *

 * @struct apml_reg_xfer_msg

 *	Pointer to the &struct apml_reg_xfer_msg that will contain the protocol

 *	information

 *

 * @Description

 * IOCTL command for APML messages using generic _IOWR

 * The IOCTL provides userspace access to AMD sideband register xfer protocol

 * - Register xfer protocol to get/set hardware register for given offset

 */

#define SBRMI_IOCTL_REG_XFER_CMD	_IOWR(SB_BASE_IOCTL_NR, 3, struct apml_reg_xfer_msg)



#endif /*_AMD_APML_H_*/