Unverified Commit cf1ba3cb authored by Dan Carpenter's avatar Dan Carpenter Committed by Mark Brown
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spi: spi-qpic-snand: Fix ECC_CFG_ECC_DISABLE shift in qcom_spi_read_last_cw() 



The ECC_CFG_ECC_DISABLE define is BIT(0).  It's supposed to be used
directly instead of used as a shifter.

Fixes: 7304d190 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
Signed-off-by: default avatarDan Carpenter <dan.carpenter@linaro.org>
Link: https://patch.msgid.link/2f4b0a0b-2c03-41c0-8a4a-3d789a83832d@stanley.mountain


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 632556d5

drivers/spi/spi-qpic-snand.c

+1 −1
Original line number Diff line number Diff line
@@ -514,7 +514,7 @@ static int qcom_spi_read_last_cw(struct qcom_nand_controller *snandc, 
	cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) |

		0 << CW_PER_PAGE;

	cfg1 = ecc_cfg->cfg1_raw;

	ecc_bch_cfg = 1 << ECC_CFG_ECC_DISABLE;

	ecc_bch_cfg = ECC_CFG_ECC_DISABLE;



	snandc->regs->cmd = snandc->qspi->cmd;

	snandc->regs->cfg0 = cpu_to_le32(cfg0);