Commit cf7db663 authored by Luca Coelho's avatar Luca Coelho
Browse files

drm/i915/display: convert W/As in intel_display_power.c to new framework



Convert the low-hanging fruits of workaround checks to the workaround
framework.  Instead of having display structure checks for the
workarounds all over, concentrate the checks in intel_display_wa.c.

Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260305100100.332956-4-luciano.coelho@intel.com


Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
parent 57288a60
Loading
Loading
Loading
Loading
+11 −11
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@
#include "intel_display_rpm.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_display_wa.h"
#include "intel_dmc.h"
#include "intel_dram.h"
#include "intel_mchbar_regs.h"
@@ -1621,8 +1622,7 @@ static void tgl_bw_buddy_init(struct intel_display *display)
	if (display->platform.dgfx && !display->platform.dg1)
		return;

	if (display->platform.alderlake_s ||
	    (display->platform.rocketlake && IS_DISPLAY_STEP(display, STEP_A0, STEP_B0)))
	if (intel_display_wa(display, INTEL_DISPLAY_WA_1409767108))
		/* Wa_1409767108 */
		table = wa_1409767108_buddy_page_masks;
	else
@@ -1645,7 +1645,7 @@ static void tgl_bw_buddy_init(struct intel_display *display)
				       table[config].page_mask);

			/* Wa_22010178259:tgl,dg1,rkl,adl-s */
			if (DISPLAY_VER(display) == 12)
			if (intel_display_wa(display, INTEL_DISPLAY_WA_22010178259))
				intel_de_rmw(display, BW_BUDDY_CTL(i),
					     BW_BUDDY_TLB_REQ_TIMER_MASK,
					     BW_BUDDY_TLB_REQ_TIMER(0x8));
@@ -1662,8 +1662,7 @@ static void icl_display_core_init(struct intel_display *display,
	gen9_set_dc_state(display, DC_STATE_DISABLE);

	/* Wa_14011294188:ehl,jsl,tgl,rkl,adl-s */
	if (INTEL_PCH_TYPE(display) >= PCH_TGP &&
	    INTEL_PCH_TYPE(display) < PCH_DG1)
	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011294188))
		intel_de_rmw(display, SOUTH_DSPCLK_GATE_D, 0,
			     PCH_DPMGUNIT_CLOCK_GATE_DISABLE);

@@ -1717,17 +1716,17 @@ static void icl_display_core_init(struct intel_display *display,
		intel_dmc_load_program(display);

	/* Wa_14011508470:tgl,dg1,rkl,adl-s,adl-p,dg2 */
	if (IS_DISPLAY_VERx100(display, 1200, 1300))
	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011508470))
		intel_de_rmw(display, GEN11_CHICKEN_DCPR_2, 0,
			     DCPR_CLEAR_MEMSTAT_DIS | DCPR_SEND_RESP_IMM |
			     DCPR_MASK_LPMODE | DCPR_MASK_MAXLATENCY_MEMUP_CLR);

	/* Wa_14011503030:xelpd */
	if (DISPLAY_VER(display) == 13)
	if (intel_display_wa(display, INTEL_DISPLAY_WA_14011503030))
		intel_de_write(display, XELPD_DISPLAY_ERR_FATAL_MASK, ~0);

	/* Wa_15013987218 */
	if (DISPLAY_VER(display) == 20) {
	if (intel_display_wa(display, INTEL_DISPLAY_WA_15013987218)) {
		intel_de_rmw(display, SOUTH_DSPCLK_GATE_D,
			     0, PCH_GMBUSUNIT_CLOCK_GATE_DISABLE);
		intel_de_rmw(display, SOUTH_DSPCLK_GATE_D,
@@ -2266,8 +2265,9 @@ void intel_display_power_suspend_late(struct intel_display *display, bool s2idle
	}

	/* Tweaked Wa_14010685332:cnp,icp,jsp,mcc,tgp,adp */
	if (INTEL_PCH_TYPE(display) >= PCH_CNP && INTEL_PCH_TYPE(display) < PCH_DG1)
		intel_de_rmw(display, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
	if (intel_display_wa(display, INTEL_DISPLAY_WA_14010685332))
		intel_de_rmw(display, SOUTH_CHICKEN1,
			     SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
}

void intel_display_power_resume_early(struct intel_display *display)
@@ -2281,7 +2281,7 @@ void intel_display_power_resume_early(struct intel_display *display)
	}

	/* Tweaked Wa_14010685332:cnp,icp,jsp,mcc,tgp,adp */
	if (INTEL_PCH_TYPE(display) >= PCH_CNP && INTEL_PCH_TYPE(display) < PCH_DG1)
	if (intel_display_wa(display, INTEL_DISPLAY_WA_14010685332))
		intel_de_rmw(display, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 0);

	intel_power_domains_resume(display);
+18 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@
#include "intel_display_core.h"
#include "intel_display_regs.h"
#include "intel_display_wa.h"
#include "intel_step.h"

static void gen11_display_wa_apply(struct intel_display *display)
{
@@ -69,23 +70,40 @@ static bool intel_display_needs_wa_16025573575(struct intel_display *display)
bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name)
{
	switch (wa) {
	case INTEL_DISPLAY_WA_1409767108:
		return (display->platform.alderlake_s ||
			(display->platform.rocketlake &&
			 IS_DISPLAY_STEP(display, STEP_A0, STEP_B0)));
	case INTEL_DISPLAY_WA_13012396614:
		return DISPLAY_VERx100(display) == 3000 ||
			DISPLAY_VERx100(display) == 3500;
	case INTEL_DISPLAY_WA_14010685332:
		return INTEL_PCH_TYPE(display) >= PCH_CNP &&
			INTEL_PCH_TYPE(display) < PCH_DG1;
	case INTEL_DISPLAY_WA_14011294188:
		return INTEL_PCH_TYPE(display) >= PCH_TGP &&
			INTEL_PCH_TYPE(display) < PCH_DG1;
	case INTEL_DISPLAY_WA_14011503030:
	case INTEL_DISPLAY_WA_14011503117:
		return DISPLAY_VER(display) == 13;
	case INTEL_DISPLAY_WA_14011508470:
		return (IS_DISPLAY_VERx100(display, 1200, 1300));
	case INTEL_DISPLAY_WA_14020863754:
		return DISPLAY_VERx100(display) == 3000 ||
			DISPLAY_VERx100(display) == 2000 ||
			DISPLAY_VERx100(display) == 1401;
	case INTEL_DISPLAY_WA_14025769978:
		return DISPLAY_VER(display) == 35;
	case INTEL_DISPLAY_WA_15013987218:
		return DISPLAY_VER(display) == 20;
	case INTEL_DISPLAY_WA_15018326506:
		return display->platform.battlemage;
	case INTEL_DISPLAY_WA_16023588340:
		return intel_display_needs_wa_16023588340(display);
	case INTEL_DISPLAY_WA_16025573575:
		return intel_display_needs_wa_16025573575(display);
	case INTEL_DISPLAY_WA_22010178259:
		return DISPLAY_VER(display) == 12;
	case INTEL_DISPLAY_WA_22014263786:
		return IS_DISPLAY_VERx100(display, 1100, 1400);
	case INTEL_DISPLAY_WA_22021048059:
+7 −0
Original line number Diff line number Diff line
@@ -27,13 +27,20 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display);
 * number.
 */
enum intel_display_wa {
	INTEL_DISPLAY_WA_1409767108,
	INTEL_DISPLAY_WA_13012396614,
	INTEL_DISPLAY_WA_14010685332,
	INTEL_DISPLAY_WA_14011294188,
	INTEL_DISPLAY_WA_14011503030,
	INTEL_DISPLAY_WA_14011503117,
	INTEL_DISPLAY_WA_14011508470,
	INTEL_DISPLAY_WA_14020863754,
	INTEL_DISPLAY_WA_14025769978,
	INTEL_DISPLAY_WA_15013987218,
	INTEL_DISPLAY_WA_15018326506,
	INTEL_DISPLAY_WA_16023588340,
	INTEL_DISPLAY_WA_16025573575,
	INTEL_DISPLAY_WA_22010178259,
	INTEL_DISPLAY_WA_22014263786,
	INTEL_DISPLAY_WA_22021048059,
};