Commit cfe7267e authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Michał Winiarski
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drm/xe: Mark VF accessible GuC registers 



Only selected registers are available for Virtual Functions.

Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240314173130.1177-4-michal.wajdeczko@intel.com


Signed-off-by: default avatarMichał Winiarski <michal.winiarski@intel.com>
parent 5a9481a8

drivers/gpu/drm/xe/regs/xe_guc_regs.h

+4 −4
Original line number Diff line number Diff line
@@ -100,14 +100,14 @@ 
#define GT_PM_CONFIG				XE_REG(0x13816c)

#define   GT_DOORBELL_ENABLE			REG_BIT(0)



#define GUC_HOST_INTERRUPT			XE_REG(0x1901f0)

#define GUC_HOST_INTERRUPT			XE_REG(0x1901f0, XE_REG_OPTION_VF)



#define VF_SW_FLAG(n)				XE_REG(0x190240 + (n) * 4)

#define VF_SW_FLAG(n)				XE_REG(0x190240 + (n) * 4, XE_REG_OPTION_VF)

#define VF_SW_FLAG_COUNT			4



#define MED_GUC_HOST_INTERRUPT			XE_REG(0x190304)

#define MED_GUC_HOST_INTERRUPT			XE_REG(0x190304, XE_REG_OPTION_VF)



#define MED_VF_SW_FLAG(n)			XE_REG(0x190310 + (n) * 4)

#define MED_VF_SW_FLAG(n)			XE_REG(0x190310 + (n) * 4, XE_REG_OPTION_VF)

#define MED_VF_SW_FLAG_COUNT			4



#define GUC_TLB_INV_CR				XE_REG(0xcee8)