Commit d03279f0 authored by Mahadevan P's avatar Mahadevan P Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Fix Kaanapali CWB register configuration 



The Kaanapali DPU catalog defines kaanapali_cwb[] with the correct
CWB base addresses for this platform (0x169200, 0x169600, 0x16a200,
0x16a600), but the dpu_kaanapali_cfg struct was mistakenly pointing
to sm8650_cwb instead. The SM8650 CWB blocks sit at completely
different offsets (0x66200, 0x66600, 0x7E200, 0x7E600), so using
them on Kaanapali would program CWB registers at wrong addresses,
corrupting unrelated hardware blocks and breaking writeback capture.

Fix this by pointing .cwb to the correct kaanapali_cwb array.

Fixes: 83fe2cd5 ("drm/msm/dpu: Add support for Kaanapali DPU")
Signed-off-by: default avatarMahadevan P <mahadevan.p@oss.qualcomm.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/721444/
Link: https://lore.kernel.org/r/20260428-kaanapali_cwb-v1-1-51fdb2c65498@oss.qualcomm.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
parent 933430f1

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_13_0_kaanapali.h

+1 −1
Original line number Diff line number Diff line
@@ -480,7 +480,7 @@ const struct dpu_mdss_cfg dpu_kaanapali_cfg = { 
	.wb_count = ARRAY_SIZE(kaanapali_wb),

	.wb = kaanapali_wb,

	.cwb_count = ARRAY_SIZE(kaanapali_cwb),

	.cwb = sm8650_cwb,

	.cwb = kaanapali_cwb,

	.intf_count = ARRAY_SIZE(kaanapali_intf),

	.intf = kaanapali_intf,

	.vbif = &sm8650_vbif,