Commit d065453e authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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arm64: dts: renesas: rzt2h-rzn2h-evk: Enable SD card slot 



Enable SD card slot which is connected to SDHI0 on the RZ/T2H and
RZ/N2H EVKs.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250820200659.2048755-10-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent dba8ee27

arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts

+5 −0
Original line number Diff line number Diff line
@@ -14,8 +14,13 @@ 
 * Lets by default enable the eMMC, note we need the below SW settings

 * for eMMC.

 * SW2[1] = ON; SW2[2] = ON

 *

 * To enable SD card and disable eMMC on SDHI0 disable the below macro

 * and set the below switch setting:

 * SW2[1] = OFF; SW2[2] = ON

 */

#define SD0_EMMC	1

#define SD0_SD		(!SD0_EMMC)



/*

 * P17_4 = SD1_CD; SW2[3] = ON

arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts

+9 −0
Original line number Diff line number Diff line
@@ -15,8 +15,17 @@ 
 * for eMMC.

 * DSW5[1] = ON; DSW5[2] = ON

 * DSW17[5] = OFF; DSW17[6] = ON

 *

 * To enable SD card and disable eMMC on SDHI0 disable the below macro

 * and set the below switch setting:

 * DSW5[1] = OFF; DSW5[2] = ON

 * P22_6 = SD0_WP; DSW15[1] = OFF; DSW15[2] = ON

 * P22_5 = SD0_CD; DSW15[3] = OFF; DSW15[4] = ON

 * P02_6 = SD0_IOVS; DSW17[5] = OFF; DSW17[6] = ON

 * P02_5 = SD0_PWEN; DSW17[7] = OFF; DSW17[8] = ON

 */

#define SD0_EMMC       1

#define SD0_SD		(!SD0_EMMC)



/*

 * P17_4 = SD1_CD; DSW5[3] = ON; DSW19[1] = OFF; DSW19[2] = ON

arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi

+51 −0
Original line number Diff line number Diff line
@@ -40,6 +40,18 @@ reg_3p3v: regulator-3p3v { 
		regulator-always-on;

	};



#if SD0_SD

	vqmmc_sdhi0: regulator-vqmmc-sdhi0 {

		compatible = "regulator-gpio";

		regulator-name = "SDHI0 VqmmC";

		gpios = <&pinctrl RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>;

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;

		gpios-states = <0>;

		states = <3300000 0>, <1800000 1>;

	};

#endif



#if SD1_MICRO_SD

	vccq_sdhi1: regulator-vccq-sdhi1 {

		compatible = "regulator-gpio";
@@ -107,6 +119,31 @@ ctrl-pins { 
		};

	};



#if SD0_SD

	sdhi0-pwen-hog {

		gpio-hog;

		gpios = <RZT2H_GPIO(2, 5) GPIO_ACTIVE_HIGH>;

		output-high;

		line-name = "SD0_PWEN";

	};

#endif



	sdhi0_sd_pins: sd0-sd-group {

		data-pins {

			pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */

				 <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */

				 <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */

				 <RZT2H_PORT_PINMUX(12, 5, 0x29)>; /* SD0_DATA3 */

		};



		ctrl-pins {

			pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */

				 <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */

				 <RZT2H_PORT_PINMUX(22, 5, 0x29)>, /* SD0_CD */

				 <RZT2H_PORT_PINMUX(22, 6, 0x29)>; /* SD0_WP */

		};

	};



#if SD1_MICRO_SD

	sdhi1-pwen-hog {

		gpio-hog;
@@ -153,6 +190,20 @@ &sdhi0 { 
};

#endif



#if SD0_SD

&sdhi0 {

	pinctrl-0 = <&sdhi0_sd_pins>;

	pinctrl-1 = <&sdhi0_sd_pins>;

	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&reg_3p3v>;

	vqmmc-supply = <&vqmmc_sdhi0>;

	bus-width = <4>;

	sd-uhs-sdr50;

	sd-uhs-sdr104;

	status = "okay";

};

#endif



#if SD1_MICRO_SD

&sdhi1 {

	pinctrl-0 = <&sdhi1_pins>;