Commit d07722e1 authored by Austin Zheng's avatar Austin Zheng Committed by Alex Deucher
Browse files

drm/amd/display: DML2.1 Reintegration for Various Fixes 



[Why and How]
DML2.1 reintegration for several fixes and updates to the DML
code.

Reviewed-by: default avatarDillon Varone <dillon.varone@amd.com>
Signed-off-by: default avatarAustin Zheng <Austin.Zheng@amd.com>
Signed-off-by: default avatarRoman Li <roman.li@amd>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 20b5a8f9

drivers/gpu/drm/amd/display/dc/dml2/Makefile

+0 −3
Original line number Diff line number Diff line
@@ -79,7 +79,6 @@ CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml2_top_optimization := $(dml2_ 
CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.o := $(dml2_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.o := $(dml2_ccflags) $(frame_warn_flag)

CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_factory.o := $(dml2_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_shared.o := $(dml2_ccflags) $(frame_warn_flag)

CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.o := $(dml2_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_factory.o := $(dml2_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.o := $(dml2_ccflags)
@@ -101,7 +100,6 @@ CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml2_top_optimization.o : 
CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.o := $(dml2_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.o := $(dml2_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_factory.o := $(dml2_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_shared.o := $(dml2_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.o := $(dml2_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_factory.o := $(dml2_rcflags)

CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.o := $(dml2_rcflags)
@@ -122,7 +120,6 @@ DML21 += src/inc/dml2_debug.o 
DML21 += src/dml2_core/dml2_core_dcn4.o

DML21 += src/dml2_core/dml2_core_factory.o

DML21 += src/dml2_core/dml2_core_dcn4_calcs.o

DML21 += src/dml2_core/dml2_core_shared.o

DML21 += src/dml2_dpmm/dml2_dpmm_dcn4.o

DML21 += src/dml2_dpmm/dml2_dpmm_factory.o

DML21 += src/dml2_mcg/dml2_mcg_dcn4.o

drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/dcn4_soc_bb.h

+1 −1
Original line number Diff line number Diff line
@@ -355,7 +355,7 @@ static const struct dml2_ip_capabilities dml2_dcn401_max_ip_caps = { 
	.fams2 = {

		.max_allow_delay_us = 100 * 1000,

		.scheduling_delay_us = 125,

		.vertical_interrupt_ack_delay_us = 18,

		.vertical_interrupt_ack_delay_us = 40,

		.allow_programming_delay_us = 18,

		.min_allow_width_us = 20,

		.subvp_df_throttle_delay_us = 100,

drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_soc_parameter_types.h

+1 −0
Original line number Diff line number Diff line
@@ -151,6 +151,7 @@ struct dml2_soc_bb { 
	double phy_downspread_percent;

	double dcn_downspread_percent;

	double dispclk_dppclk_vco_speed_mhz;

	bool no_dfs;

	bool do_urgent_latency_adjustment;

	unsigned int mem_word_bytes;

	unsigned int num_dcc_mcaches;

drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c

+0 −1
Original line number Diff line number Diff line
@@ -273,7 +273,6 @@ static void pack_mode_programming_params_with_implicit_subvp(struct dml2_core_in 
		programming->fams2_required = display_cfg->stage3.fams2_required;



		dml2_core_calcs_get_global_fams2_programming(&core->clean_me_up.mode_lib, display_cfg, &programming->fams2_global_config);

		programming->fams2_global_config.features.bits.enable = display_cfg->stage3.fams2_required;

	}



	// Only loop over all the main streams (the implicit svp streams will be packed as part of the main stream)

drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

+262 −216

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