Commit d12f68b5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull pwm updates from Uwe Kleine-König:
 "This time there are very little changes for pwm. There is nothing new,
  just a few maintenance cleanups.

  The contributors this time around were Krzysztof Kozlowski, Mingwei
  Zheng, Philipp Stanner, and Stanislav Jakubek. Thanks!"

* tag 'pwm/for-6.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux:
  pwm: stm32: Add check for clk_enable()
  dt-bindings: pwm: Correct indentation and style in DTS example
  pwm: stm32-lp: Add check for clk_enable()
  dt-bindings: pwm: marvell,berlin-pwm: Convert from txt to yaml
  dt-bindings: pwm: sprd,ums512-pwm: convert to YAML
  pwm: Replace deprecated PCI functions
parents 2bf717b0 e8c59791
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/marvell,berlin-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Berlin PWM controller

maintainers:
  - Jisheng Zhang <jszhang@kernel.org>
  - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

properties:
  compatible:
    const: marvell,berlin-pwm

  reg:
    maxItems: 1

  "#pwm-cells":
    const: 3

  clocks:
    maxItems: 1

required:
  - compatible
  - reg
  - clocks

allOf:
  - $ref: pwm.yaml#

unevaluatedProperties: false

examples:
  - |
    pwm@f7f20000 {
        compatible = "marvell,berlin-pwm";
        reg = <0xf7f20000 0x40>;
        clocks = <&chip_clk 12>;
        #pwm-cells = <3>;
    };
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Berlin PWM controller

Required properties:
- compatible: should be "marvell,berlin-pwm"
- reg: physical base address and length of the controller's registers
- clocks: phandle to the input clock
- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
  the cells format.

Example:

pwm: pwm@f7f20000 {
	compatible = "marvell,berlin-pwm";
	reg = <0xf7f20000 0x40>;
	clocks = <&chip_clk CLKID_CFG>;
	#pwm-cells = <3>;
}
+0 −40
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Spreadtrum PWM controller

Spreadtrum SoCs PWM controller provides 4 PWM channels.

Required properties:
- compatible : Should be "sprd,ums512-pwm".
- reg: Physical base address and length of the controller's registers.
- clocks: The phandle and specifier referencing the controller's clocks.
- clock-names: Should contain following entries:
  "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3).
  "enablen": for PWM channel n enable clock (n range: 0 ~ 3).
- #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
  the cells format.

Optional properties:
- assigned-clocks: Reference to the PWM clock entries.
- assigned-clock-parents: The phandle of the parent clock of PWM clock.

Example:
	pwms: pwm@32260000 {
		compatible = "sprd,ums512-pwm";
		reg = <0 0x32260000 0 0x10000>;
		clock-names = "pwm0", "enable0",
			"pwm1", "enable1",
			"pwm2", "enable2",
			"pwm3", "enable3";
		clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
		       <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
		       <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
		       <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
		assigned-clocks = <&aon_clk CLK_PWM0>,
			<&aon_clk CLK_PWM1>,
			<&aon_clk CLK_PWM2>,
			<&aon_clk CLK_PWM3>;
		assigned-clock-parents = <&ext_26m>,
			<&ext_26m>,
			<&ext_26m>,
			<&ext_26m>;
		#pwm-cells = <2>;
	};
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/sprd,ums512-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Spreadtrum/Unisoc UMS512 PWM Controller

maintainers:
  - Orson Zhai <orsonzhai@gmail.com>
  - Baolin Wang <baolin.wang@linux.alibaba.com>
  - Chunyan Zhang <zhang.lyra@gmail.com>

properties:
  compatible:
    const: sprd,ums512-pwm

  reg:
    maxItems: 1

  clocks:
    maxItems: 8

  clock-names:
    items:
      - const: pwm0
      - const: enable0
      - const: pwm1
      - const: enable1
      - const: pwm2
      - const: enable2
      - const: pwm3
      - const: enable3

  '#pwm-cells':
    const: 2

required:
  - compatible
  - reg
  - clocks
  - clock-names

allOf:
  - $ref: pwm.yaml#

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/sprd,ums512-clk.h>

    pwm@32260000 {
      compatible = "sprd,ums512-pwm";
      reg = <0x32260000 0x10000>;
      clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
               <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
               <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
               <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
      clock-names = "pwm0", "enable0",
                    "pwm1", "enable1",
                    "pwm2", "enable2",
                    "pwm3", "enable3";
      #pwm-cells = <2>;
    };
...
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@@ -66,20 +66,16 @@ static int dwc_pwm_probe(struct pci_dev *pci, const struct pci_device_id *id)

	pci_set_master(pci);

	ret = pcim_iomap_regions(pci, BIT(0), pci_name(pci));
	if (ret)
		return dev_err_probe(dev, ret, "Failed to iomap PCI BAR\n");

	info = (const struct dwc_pwm_info *)id->driver_data;
	ddata = devm_kzalloc(dev, struct_size(ddata, chips, info->nr), GFP_KERNEL);
	if (!ddata)
		return -ENOMEM;

	/*
	 * No need to check for pcim_iomap_table() failure,
	 * pcim_iomap_regions() already does it for us.
	 */
	ddata->io_base = pcim_iomap_table(pci)[0];
	ddata->io_base = pcim_iomap_region(pci, 0, "pwm-dwc");
	if (IS_ERR(ddata->io_base))
		return dev_err_probe(dev, PTR_ERR(ddata->io_base),
				     "Failed to request / iomap PCI BAR\n");

	ddata->info = info;

	for (idx = 0; idx < ddata->info->nr; idx++) {
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