Commit d1475cde authored by William Zhang's avatar William Zhang Committed by Florian Fainelli
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ARM: dts: bcmbca: bcm63178: fix timer node cpu mask flag



The cpu mask flag value should match the number of cpu cores in the
chip. Correct the value to three cpus for BCM63178 triple core SoC.

Fixes: fc85b7e6 ("ARM: dts: add dts files for bcmbca soc 63178")
Signed-off-by: default avatarWilliam Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20220801194448.29363-1-william.zhang@broadcom.com


Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 568035b0
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+4 −4
Original line number Diff line number Diff line
@@ -46,10 +46,10 @@ L2_0: l2-cache0 {

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>;
		arm,cpu-registers-not-fw-configured;
	};