Commit d1927f64 authored by Atish Patra's avatar Atish Patra Committed by Anup Patel
Browse files

RISC-V: Fix the typo in Scountovf CSR name 



The counter overflow CSR name is "scountovf" not "sscountovf".

Fix the csr name.

Fixes: 4905ec2f ("RISC-V: Add sscofpmf extension support")
Reviewed-by: default avatarClément Léger <cleger@rivosinc.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Acked-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: default avatarAtish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-2-atishp@rivosinc.com


Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 9752fed8

arch/riscv/include/asm/csr.h

+1 −1
Original line number Diff line number Diff line
@@ -281,7 +281,7 @@ 
#define CSR_HPMCOUNTER30H	0xc9e

#define CSR_HPMCOUNTER31H	0xc9f



#define CSR_SSCOUNTOVF		0xda0

#define CSR_SCOUNTOVF		0xda0



#define CSR_SSTATUS		0x100

#define CSR_SIE			0x104

drivers/perf/riscv_pmu_sbi.c

+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ 


#define ALT_SBI_PMU_OVERFLOW(__ovl)					\

asm volatile(ALTERNATIVE_2(						\

	"csrr %0, " __stringify(CSR_SSCOUNTOVF),			\

	"csrr %0, " __stringify(CSR_SCOUNTOVF),				\

	"csrr %0, " __stringify(THEAD_C9XX_CSR_SCOUNTEROF),		\

		THEAD_VENDOR_ID, ERRATA_THEAD_PMU,			\

		CONFIG_ERRATA_THEAD_PMU,				\