Commit d1a6f125 authored by Horatiu Vultur's avatar Horatiu Vultur Committed by Claudiu Beznea
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ARM: dts: microchip: lan966x: Fix the access to the PHYs for pcb8290 



The problem is that the MDIO controller can't detect any of the PHYs.
The reason is that the lan966x is not pulling high the GPIO 53 that is
connected to the PHYs reset GPIO. Without doing this the PHYs are kept
in reset. The mdio controller framework has the possibility to control a
GPIO to release the reset of the PHYs. So take advantage of this and set
line to be high before accessing the PHYs.

Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: default avatarClaudiu Beznea <claudiu.beznea@tuxon.dev>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20251119134750.394655-1-horatiu.vultur@microchip.com


[claudiu.beznea: add microchip in patch title, s/possiblity/possibility
 in patch description]
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@tuxon.dev>
parent 8f0b4cce

arch/arm/boot/dts/microchip/lan966x-pcb8290.dts

+1 −0
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ udc_pins: ucd-pins { 
&mdio0 {

	pinctrl-0 = <&miim_a_pins>;

	pinctrl-names = "default";

	reset-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;

	status = "okay";



	ext_phy0: ethernet-phy@7 {