Commit d1c13e80 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2024-04-12' of https://gitlab.freedesktop.org/drm/kernel 

Pull drm fixes from Dave Airlie:
 "Looks like everyone woke up after holidays, this weeks pull has a
  bunch of stuff all over, 2 weeks worth of amdgpu is a lot of it, then
  i915/xe have a few, a bunch of msm fixes, then some scattered driver
  fixes.

  I expect things will settle down for rc5.

  client:
   - Protect connector modes with mode_config mutex

  ast:
   - Fix soft lockup

  host1x:
   - Do not setup DMA for virtual addresses

  ivpu:
   - Fix deadlock in context_xa
   - PCI fixes
   - Fixes to error handling

  nouveau:
   - gsp: Fix OOB access
   - Fix casting

  panfrost:
   - Fix error path in MMU code

  qxl:
   - Revert "drm/qxl: simplify qxl_fence_wait"

  vmwgfx:
   - Enable DMA for SEV mappings

  i915:
   - Couple CDCLK programming fixes
   - HDCP related fix
   - 4 Bigjoiner related fixes
   - Fix for a circular locking around GuC on reset+wedged case

  xe:
   - Fix double display mutex initializations
   - Fix u32 -> u64 implicit conversions
   - Fix RING_CONTEXT_CONTROL not marked as masked

  msm:
   - DP refcount leak fix on disconnect
   - Add missing newlines to prints in msm_fb and msm_kms
   - fix dpu debugfs entry permissions
   - Fix the interface table for the catalog of X1E80100
   - fix irq message printing
   - Bindings fix to add DP node as child of mdss for mdss node
   - Minor typo fix in DP driver API which handles port status change
   - fix CHRASHDUMP_READ()
   - fix HHB (highest bank bit) for a619 to fix UBWC corruption

  amdgpu:
   - GPU reset fixes
   - Fix some confusing logging
   - UMSCH fix
   - Aborted suspend fix
   - DCN 3.5 fixes
   - S4 fix
   - MES logging fixes
   - SMU 14 fixes
   - SDMA 4.4.2 fix
   - KASAN fix
   - SMU 13.0.10 fix
   - VCN partition fix
   - GFX11 fixes
   - DWB fixes
   - Plane handling fix
   - FAMS fix
   - DCN 3.1.6 fix
   - VSC SDP fixes
   - OLED panel fix
   - GFX 11.5 fix

  amdkfd:
   - GPU reset fixes
   - fix ioctl integer overflow"

* tag 'drm-fixes-2024-04-12' of https://gitlab.freedesktop.org/drm/kernel: (65 commits)
  amdkfd: use calloc instead of kzalloc to avoid integer overflow
  drm/xe: Label RING_CONTEXT_CONTROL as masked
  drm/xe/xe_migrate: Cast to output precision before multiplying operands
  drm/xe/hwmon: Cast result to output precision on left shift of operand
  drm/xe/display: Fix double mutex initialization
  drm/amdgpu: differentiate external rev id for gfx 11.5.0
  drm/amd/display: Adjust dprefclk by down spread percentage.
  drm/amd/display: Set VSC SDP Colorimetry same way for MST and SST
  drm/amd/display: Program VSC SDP colorimetry for all DP sinks >= 1.4
  drm/amd/display: fix disable otg wa logic in DCN316
  drm/amd/display: Do not recursively call manual trigger programming
  drm/amd/display: always reset ODM mode in context when adding first plane
  drm/amdgpu: fix incorrect number of active RBs for gfx11
  drm/amd/display: Return max resolution supported by DWB
  amd/amdkfd: sync all devices to wait all processes being evicted
  drm/amdgpu: clear set_q_mode_offs when VM changed
  drm/amdgpu: Fix VCN allocation in CPX partition
  drm/amd/pm: fix the high voltage issue after unload
  drm/amd/display: Skip on writeback when it's not applicable
  drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
  ...
parents 586b5dfb 3b0daecf

Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml

+9 −0
Original line number Diff line number Diff line
@@ -53,6 +53,15 @@ patternProperties: 
      compatible:

        const: qcom,sm8150-dpu



  "^displayport-controller@[0-9a-f]+$":

    type: object

    additionalProperties: true



    properties:

      compatible:

        contains:

          const: qcom,sm8150-dp



  "^dsi@[0-9a-f]+$":

    type: object

    additionalProperties: true

drivers/accel/ivpu/ivpu_drv.c

+12 −28
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (C) 2020-2023 Intel Corporation

 * Copyright (C) 2020-2024 Intel Corporation

 */



#include <linux/firmware.h>
@@ -131,22 +131,6 @@ static int ivpu_get_capabilities(struct ivpu_device *vdev, struct drm_ivpu_param 
	return 0;

}



static int ivpu_get_core_clock_rate(struct ivpu_device *vdev, u64 *clk_rate)

{

	int ret;



	ret = ivpu_rpm_get_if_active(vdev);

	if (ret < 0)

		return ret;



	*clk_rate = ret ? ivpu_hw_reg_pll_freq_get(vdev) : 0;



	if (ret)

		ivpu_rpm_put(vdev);



	return 0;

}



static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file)

{

	struct ivpu_file_priv *file_priv = file->driver_priv;
@@ -170,7 +154,7 @@ static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_f 
		args->value = vdev->platform;

		break;

	case DRM_IVPU_PARAM_CORE_CLOCK_RATE:

		ret = ivpu_get_core_clock_rate(vdev, &args->value);

		args->value = ivpu_hw_ratio_to_freq(vdev, vdev->hw->pll.max_ratio);

		break;

	case DRM_IVPU_PARAM_NUM_CONTEXTS:

		args->value = ivpu_get_context_count(vdev);
@@ -387,12 +371,15 @@ int ivpu_shutdown(struct ivpu_device *vdev) 
{

	int ret;



	ivpu_prepare_for_reset(vdev);

	/* Save PCI state before powering down as it sometimes gets corrupted if NPU hangs */

	pci_save_state(to_pci_dev(vdev->drm.dev));



	ret = ivpu_hw_power_down(vdev);

	if (ret)

		ivpu_warn(vdev, "Failed to power down HW: %d\n", ret);



	pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);



	return ret;

}
@@ -530,7 +517,7 @@ static int ivpu_dev_init(struct ivpu_device *vdev) 
	vdev->context_xa_limit.min = IVPU_USER_CONTEXT_MIN_SSID;

	vdev->context_xa_limit.max = IVPU_USER_CONTEXT_MAX_SSID;

	atomic64_set(&vdev->unique_id_counter, 0);

	xa_init_flags(&vdev->context_xa, XA_FLAGS_ALLOC);

	xa_init_flags(&vdev->context_xa, XA_FLAGS_ALLOC | XA_FLAGS_LOCK_IRQ);

	xa_init_flags(&vdev->submitted_jobs_xa, XA_FLAGS_ALLOC1);

	xa_init_flags(&vdev->db_xa, XA_FLAGS_ALLOC1);

	lockdep_set_class(&vdev->submitted_jobs_xa.xa_lock, &submitted_jobs_xa_lock_class_key);
@@ -560,11 +547,11 @@ static int ivpu_dev_init(struct ivpu_device *vdev) 
	/* Power up early so the rest of init code can access VPU registers */

	ret = ivpu_hw_power_up(vdev);

	if (ret)

		goto err_power_down;

		goto err_shutdown;



	ret = ivpu_mmu_global_context_init(vdev);

	if (ret)

		goto err_power_down;

		goto err_shutdown;



	ret = ivpu_mmu_init(vdev);

	if (ret)
@@ -601,10 +588,8 @@ static int ivpu_dev_init(struct ivpu_device *vdev) 
	ivpu_mmu_reserved_context_fini(vdev);

err_mmu_gctx_fini:

	ivpu_mmu_global_context_fini(vdev);

err_power_down:

	ivpu_hw_power_down(vdev);

	if (IVPU_WA(d3hot_after_power_off))

		pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);

err_shutdown:

	ivpu_shutdown(vdev);

err_xa_destroy:

	xa_destroy(&vdev->db_xa);

	xa_destroy(&vdev->submitted_jobs_xa);
@@ -628,9 +613,8 @@ static void ivpu_bo_unbind_all_user_contexts(struct ivpu_device *vdev) 
static void ivpu_dev_fini(struct ivpu_device *vdev)

{

	ivpu_pm_disable(vdev);

	ivpu_prepare_for_reset(vdev);

	ivpu_shutdown(vdev);

	if (IVPU_WA(d3hot_after_power_off))

		pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);



	ivpu_jobs_abort_all(vdev);

	ivpu_job_done_consumer_fini(vdev);

drivers/accel/ivpu/ivpu_drv.h

+1 −2
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (C) 2020-2023 Intel Corporation

 * Copyright (C) 2020-2024 Intel Corporation

 */



#ifndef __IVPU_DRV_H__
@@ -90,7 +90,6 @@ 
struct ivpu_wa_table {

	bool punit_disabled;

	bool clear_runtime_mem;

	bool d3hot_after_power_off;

	bool interrupt_clear_with_0;

	bool disable_clock_relinquish;

	bool disable_d0i3_msg;

drivers/accel/ivpu/ivpu_hw.h

+6 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ struct ivpu_hw_ops { 
	u32 (*profiling_freq_get)(struct ivpu_device *vdev);

	void (*profiling_freq_drive)(struct ivpu_device *vdev, bool enable);

	u32 (*reg_pll_freq_get)(struct ivpu_device *vdev);

	u32 (*ratio_to_freq)(struct ivpu_device *vdev, u32 ratio);

	u32 (*reg_telemetry_offset_get)(struct ivpu_device *vdev);

	u32 (*reg_telemetry_size_get)(struct ivpu_device *vdev);

	u32 (*reg_telemetry_enable_get)(struct ivpu_device *vdev);
@@ -130,6 +131,11 @@ static inline u32 ivpu_hw_reg_pll_freq_get(struct ivpu_device *vdev) 
	return vdev->hw->ops->reg_pll_freq_get(vdev);

};



static inline u32 ivpu_hw_ratio_to_freq(struct ivpu_device *vdev, u32 ratio)

{

	return vdev->hw->ops->ratio_to_freq(vdev, ratio);

}



static inline u32 ivpu_hw_reg_telemetry_offset_get(struct ivpu_device *vdev)

{

	return vdev->hw->ops->reg_telemetry_offset_get(vdev);

drivers/accel/ivpu/ivpu_hw_37xx.c

+5 −6
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (C) 2020-2023 Intel Corporation

 * Copyright (C) 2020-2024 Intel Corporation

 */



#include "ivpu_drv.h"
@@ -75,7 +75,6 @@ static void ivpu_hw_wa_init(struct ivpu_device *vdev) 
{

	vdev->wa.punit_disabled = false;

	vdev->wa.clear_runtime_mem = false;

	vdev->wa.d3hot_after_power_off = true;



	REGB_WR32(VPU_37XX_BUTTRESS_INTERRUPT_STAT, BUTTRESS_ALL_IRQ_MASK);

	if (REGB_RD32(VPU_37XX_BUTTRESS_INTERRUPT_STAT) == BUTTRESS_ALL_IRQ_MASK) {
@@ -86,7 +85,6 @@ static void ivpu_hw_wa_init(struct ivpu_device *vdev) 


	IVPU_PRINT_WA(punit_disabled);

	IVPU_PRINT_WA(clear_runtime_mem);

	IVPU_PRINT_WA(d3hot_after_power_off);

	IVPU_PRINT_WA(interrupt_clear_with_0);

}
@@ -805,12 +803,12 @@ static void ivpu_hw_37xx_profiling_freq_drive(struct ivpu_device *vdev, bool ena 
	/* Profiling freq - is a debug feature. Unavailable on VPU 37XX. */

}



static u32 ivpu_hw_37xx_pll_to_freq(u32 ratio, u32 config)

static u32 ivpu_hw_37xx_ratio_to_freq(struct ivpu_device *vdev, u32 ratio)

{

	u32 pll_clock = PLL_REF_CLK_FREQ * ratio;

	u32 cpu_clock;



	if ((config & 0xff) == PLL_RATIO_4_3)

	if ((vdev->hw->config & 0xff) == PLL_RATIO_4_3)

		cpu_clock = pll_clock * 2 / 4;

	else

		cpu_clock = pll_clock * 2 / 5;
@@ -829,7 +827,7 @@ static u32 ivpu_hw_37xx_reg_pll_freq_get(struct ivpu_device *vdev) 
	if (!ivpu_is_silicon(vdev))

		return PLL_SIMULATION_FREQ;



	return ivpu_hw_37xx_pll_to_freq(pll_curr_ratio, vdev->hw->config);

	return ivpu_hw_37xx_ratio_to_freq(vdev, pll_curr_ratio);

}



static u32 ivpu_hw_37xx_reg_telemetry_offset_get(struct ivpu_device *vdev)
@@ -1052,6 +1050,7 @@ const struct ivpu_hw_ops ivpu_hw_37xx_ops = { 
	.profiling_freq_get = ivpu_hw_37xx_profiling_freq_get,

	.profiling_freq_drive = ivpu_hw_37xx_profiling_freq_drive,

	.reg_pll_freq_get = ivpu_hw_37xx_reg_pll_freq_get,

	.ratio_to_freq = ivpu_hw_37xx_ratio_to_freq,

	.reg_telemetry_offset_get = ivpu_hw_37xx_reg_telemetry_offset_get,

	.reg_telemetry_size_get = ivpu_hw_37xx_reg_telemetry_size_get,

	.reg_telemetry_enable_get = ivpu_hw_37xx_reg_telemetry_enable_get,