Commit d1d31e27 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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pinctrl: renesas: rzt2h: Add support for RZ/N2H 



The Renesas RZ/N2H (R9A09G087) SoC shares a similar pin controller
architecture with the RZ/T2H (R9A09G077) SoC, differing primarily in the
number of supported pins: 576 on RZ/N2H versus 729 on RZ/T2H.

Add the necessary pin configuration data and compatible string to enable
support for the RZ/N2H SoC in the RZ/T2H pinctrl driver.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250808133017.2053637-4-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 34d4d093

drivers/pinctrl/renesas/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ config PINCTRL_RENESAS 
	select PINCTRL_RZG2L if ARCH_R9A09G056

	select PINCTRL_RZG2L if ARCH_R9A09G057

	select PINCTRL_RZT2H if ARCH_R9A09G077

	select PINCTRL_RZT2H if ARCH_R9A09G087

	select PINCTRL_PFC_SH7203 if CPU_SUBTYPE_SH7203

	select PINCTRL_PFC_SH7264 if CPU_SUBTYPE_SH7264

	select PINCTRL_PFC_SH7269 if CPU_SUBTYPE_SH7269

drivers/pinctrl/renesas/pinctrl-rzt2h.c

+16 −0
Original line number Diff line number Diff line
@@ -762,17 +762,33 @@ static const u8 r9a09g077_gpio_configs[] = { 
	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f,

};



static const u8 r9a09g087_gpio_configs[] = {

	0x1f, 0xff, 0xff, 0x1f, 0x00, 0xfe, 0xff, 0x00, 0x7e, 0xf0, 0xff, 0x01,

	0xff, 0xff, 0xff, 0x00, 0xe0, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x01,

	0xe0, 0xff, 0xff, 0x7f, 0x00, 0xfe, 0xff, 0x7f, 0x00, 0xfc, 0x7f,

};



static struct rzt2h_pinctrl_data r9a09g077_data = {

	.n_port_pins = ARRAY_SIZE(r9a09g077_gpio_configs) * RZT2H_PINS_PER_PORT,

	.port_pin_configs = r9a09g077_gpio_configs,

	.n_ports = ARRAY_SIZE(r9a09g077_gpio_configs),

};



static struct rzt2h_pinctrl_data r9a09g087_data = {

	.n_port_pins = ARRAY_SIZE(r9a09g087_gpio_configs) * RZT2H_PINS_PER_PORT,

	.port_pin_configs = r9a09g087_gpio_configs,

	.n_ports = ARRAY_SIZE(r9a09g087_gpio_configs),

};



static const struct of_device_id rzt2h_pinctrl_of_table[] = {

	{

		.compatible = "renesas,r9a09g077-pinctrl",

		.data = &r9a09g077_data,

	},

	{

		.compatible = "renesas,r9a09g087-pinctrl",

		.data = &r9a09g087_data,

	},

	{ /* sentinel */ }

};