Commit d261d755 authored by Jacob Keller's avatar Jacob Keller Committed by Tony Nguyen
Browse files

ice: clear time_sync_en field for E825-C during reprogramming 



When programming the Clock Generation Unit for E285-C hardware, we need
to clear the time_sync_en bit of the DWORD 9 before we set the
frequency.

Co-developed-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent 5cfb2ac2

drivers/net/ethernet/intel/ice/ice_tspll.c

+9 −0
Original line number Diff line number Diff line
@@ -342,6 +342,14 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq, 
			return err;

	}



	if (dw9.time_sync_en) {

		dw9.time_sync_en = 0;



		err = ice_write_cgu_reg(hw, ICE_CGU_R9, dw9.val);

		if (err)

			return err;

	}



	/* Set the frequency */

	dw9.time_ref_freq_sel = clk_freq;
@@ -353,6 +361,7 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq, 
		dw9.time_ref_en = 1;

		dw9.clk_eref0_en = 0;

	}

	dw9.time_sync_en = 1;

	err = ice_write_cgu_reg(hw, ICE_CGU_R9, dw9.val);

	if (err)

		return err;