Commit d2957868 authored by Peichen Huang's avatar Peichen Huang Committed by Alex Deucher
Browse files

drm/amd/display: replace dio encoder access 



[WHY]
replace dio encoder access to work with new dio encoder
assignment.

[HOW}
1. before validation, access dio encoder by get_temp_dio_link_enc()
2. after validation, access dio encoder through pipe_ctx->link_res

Reviewed-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Reviewed-by: default avatarMeenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Signed-off-by: default avatarPeichen Huang <PeiChen.Huang@amd.com>
Signed-off-by: default avatarZaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0fe2df44

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+1 −1
Original line number Diff line number Diff line
@@ -5191,7 +5191,7 @@ void get_audio_check(struct audio_info *aud_modes, 
	}

}



static struct link_encoder *get_temp_dio_link_enc(

struct link_encoder *get_temp_dio_link_enc(

		const struct resource_context *res_ctx,

		const struct resource_pool *const pool,

		const struct dc_link *link)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

+4 −1
Original line number Diff line number Diff line
@@ -1153,9 +1153,12 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx) 
	struct timing_generator *tg = pipe_ctx->stream_res.tg;

	struct dtbclk_dto_params dto_params = {0};

	int dp_hpo_inst;

	struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);

	struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc;

	struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;



	if (!dc->config.unify_link_enc_assignment)

		link_enc = link_enc_cfg_get_link_enc(link);



	if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) {

		pipe_ctx->stream_res.stream_enc->funcs->stop_hdmi_info_packets(

			pipe_ctx->stream_res.stream_enc);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

+4 −1
Original line number Diff line number Diff line
@@ -3020,9 +3020,12 @@ void dcn20_enable_stream(struct pipe_ctx *pipe_ctx) 
	enum phyd32clk_clock_source phyd32clk;

	int dp_hpo_inst;



	struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);

	struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc;

	struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;



	if (!dc->config.unify_link_enc_assignment)

		link_enc = link_enc_cfg_get_link_enc(link);



	if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {

		dto_params.otg_inst = tg->inst;

		dto_params.pixclk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

+4 −1
Original line number Diff line number Diff line
@@ -927,9 +927,12 @@ void dcn401_enable_stream(struct pipe_ctx *pipe_ctx) 
	int dp_hpo_inst = 0;

	unsigned int tmds_div = PIXEL_RATE_DIV_NA;

	unsigned int unused_div = PIXEL_RATE_DIV_NA;

	struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);

	struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc;

	struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;



	if (!dc->config.unify_link_enc_assignment)

		link_enc = link_enc_cfg_get_link_enc(link);



	dcn401_enable_stream_calc(pipe_ctx, &dp_hpo_inst, &phyd32clk,

				&tmds_div, &early_control);

drivers/gpu/drm/amd/display/dc/inc/resource.h

+5 −0
Original line number Diff line number Diff line
@@ -647,4 +647,9 @@ void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuratio 
int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master);



bool resource_is_hpo_acquired(struct dc_state *context);



struct link_encoder *get_temp_dio_link_enc(

		const struct resource_context *res_ctx,

		const struct resource_pool *const pool,

		const struct dc_link *link);

#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */