Commit d324e9a9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'rtc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux 

Pull RTC updates from Alexandre Belloni:
 "Subsystem:
   - stop setting max_user_freq from the individual drivers as this has
     not been hardware related for a while

  New drivers:
   - Andes ATCRTC100
   - Apple SMC
   - Nvidia VRS

  Drivers:
   - renesas-rtca3: add RZ/V2H support
   - tegra: add ACPI support"

* tag 'rtc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (34 commits)
  rtc: spacemit: MFD_SPACEMIT_P1 as dependencies
  rtc: atcrtc100: Fix signedness bug in probe()
  rtc: max31335: Fix ignored return value in set_alarm
  rtc: gamecube: Check the return value of ioremap()
  Documentation: ABI: testing: Fix "upto" typo in rtc-cdev
  rtc: Add new rtc-macsmc driver for Apple Silicon Macs
  dt-bindings: rtc: Add Apple SMC RTC
  MAINTAINERS: drop unneeded file entry in NVIDIA VRS RTC DRIVER
  rtc: isl12026: Add id_table
  rtc: renesas-rtca3: Add support for multiple reset lines
  dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
  rtc: tegra: Replace deprecated SIMPLE_DEV_PM_OPS
  rtc: tegra: Add ACPI support
  rtc: tegra: Use devm_clk_get_enabled() in probe
  rtc: Kconfig: add MC34708 to mc13xxx help text
  rtc: s35390a: use u8 instead of char for register buffer
  rtc: nvvrs: add NVIDIA VRS RTC device driver
  dt-bindings: rtc: Document NVIDIA VRS RTC
  rtc: atcrtc100: Add ATCRTC100 RTC driver
  MAINTAINERS: Add entry for ATCRTC100 RTC driver
  ...
parents a919610d 16bd954c

Documentation/devicetree/bindings/mfd/apple,smc.yaml

+9 −0
Original line number Diff line number Diff line
@@ -46,6 +46,9 @@ properties: 
  reboot:

    $ref: /schemas/power/reset/apple,smc-reboot.yaml



  rtc:

    $ref: /schemas/rtc/apple,smc-rtc.yaml



additionalProperties: false



required:
@@ -80,5 +83,11 @@ examples: 
          nvmem-cell-names = "shutdown_flag", "boot_stage",

                             "boot_error_count", "panic_count";

        };



        rtc {

          compatible = "apple,smc-rtc";

          nvmem-cells = <&rtc_offset>;

          nvmem-cell-names = "rtc_offset";

       };

      };

    };

Documentation/devicetree/bindings/rtc/andestech,atcrtc100.yaml

0 → 100644
+43 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/rtc/andestech,atcrtc100.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Andes ATCRTC100 Real-Time Clock



maintainers:

  - CL Wang <cl634@andestech.com>



allOf:

  - $ref: rtc.yaml#



properties:

  compatible:

    enum:

      - andestech,atcrtc100



  reg:

    maxItems: 1



  interrupts:

    items:

      - description: Periodic timekeeping interrupt

      - description: RTC alarm interrupt



required:

  - compatible

  - reg

  - interrupts



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>



    rtc@f0300000 {

        compatible = "andestech,atcrtc100";

        reg = <0xf0300000 0x100>;

        interrupts = <1 IRQ_TYPE_LEVEL_HIGH>, <2 IRQ_TYPE_LEVEL_HIGH>;

    };

Documentation/devicetree/bindings/rtc/apple,smc-rtc.yaml

0 → 100644
+35 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/rtc/apple,smc-rtc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Apple SMC RTC



description:

  Apple Silicon Macs (M1, etc.) have an RTC that is part of the PMU IC,

  but most of the PMU functionality is abstracted out by the SMC.

  An additional RTC offset stored inside NVMEM is required to compute

  the current date/time.



maintainers:

  - Sven Peter <sven@kernel.org>



properties:

  compatible:

    const: apple,smc-rtc



  nvmem-cells:

    items:

      - description: 48bit RTC offset, specified in 32768 (2^15) Hz clock ticks



  nvmem-cell-names:

    items:

      - const: rtc_offset



required:

  - compatible

  - nvmem-cells

  - nvmem-cell-names



additionalProperties: false

Documentation/devicetree/bindings/rtc/nvidia,vrs-10.yaml

0 → 100644
+59 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/rtc/nvidia,vrs-10.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NVIDIA Voltage Regulator Specification Real Time Clock



maintainers:

  - Shubhi Garg <shgarg@nvidia.com>



description:

  NVIDIA VRS-10 (Voltage Regulator Specification) is a Power Management IC

  (PMIC) that implements a power sequencing solution with I2C interface.

  The device includes a real-time clock (RTC) with 32kHz clock output and

  backup battery support, alarm functionality for system wake-up from

  suspend and shutdown states, OTP memory for power sequencing configuration,

  and an interrupt controller for managing VRS events.



properties:

  compatible:

    const: nvidia,vrs-10



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  interrupt-controller: true



  '#interrupt-cells':

    const: 2



required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - '#interrupt-cells'



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>

    i2c {

        #address-cells = <1>;

        #size-cells = <0>;



        pmic@3c {

            compatible = "nvidia,vrs-10";

            reg = <0x3c>;

            interrupt-parent = <&pmc>;

            interrupts = <24 IRQ_TYPE_LEVEL_LOW>;

            interrupt-controller;

            #interrupt-cells = <2>;

        };

    };

Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml

+41 −5
Original line number Diff line number Diff line
@@ -9,14 +9,12 @@ title: Renesas RTCA-3 Real Time Clock 
maintainers:

  - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>



allOf:

  - $ref: rtc.yaml#



properties:

  compatible:

    items:

      - enum:

          - renesas,r9a08g045-rtca3 # RZ/G3S

          - renesas,r9a09g057-rtca3 # RZ/V2H

      - const: renesas,rz-rtca3



  reg:
@@ -48,8 +46,12 @@ properties: 
    maxItems: 1



  resets:

    items:

      - description: VBATTB module reset

    minItems: 1

    maxItems: 2



  reset-names:

    minItems: 1

    maxItems: 2



required:

  - compatible
@@ -61,6 +63,39 @@ required: 
  - power-domains

  - resets



allOf:

  - $ref: rtc.yaml#



  - if:

      properties:

        compatible:

          contains:

            const: renesas,r9a08g045-rtca3

    then:

      properties:

        resets:

          items:

            - description: VBATTB module reset

        reset-names:

          const: vbattb

  - if:

      properties:

        compatible:

          contains:

            const: renesas,r9a09g057-rtca3

    then:

      properties:

        resets:

          items:

            - description: RTC reset

            - description: Reset for the RTEST registers

        reset-names:

          items:

            - const: rtc

            - const: rtest

      required:

        - reset-names



additionalProperties: false



examples:
@@ -81,4 +116,5 @@ examples: 
        clock-names = "bus", "counter";

        power-domains = <&cpg>;

        resets = <&cpg R9A08G045_VBAT_BRESETN>;

        reset-names = "vbattb";

    };