Commit d34927ac authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/cdclk: Convert CDCLK code to intel_display 



struct intel_display will replace struct drm_i915_private as
the main thing for display code. Convert the CDCLK code to
use it (as much as possible at this stage).

v2: Add local 'display' variable to __intel_display_device_info_runtime_init() (Jani)
    Simplify the to_intel_display(crtc_state) stuff (Jani)

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240906143306.15937-3-ville.syrjala@linux.intel.com


Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 25dd5e98

drivers/gpu/drm/i915/display/intel_cdclk.c

+606 −563

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/i915/display/intel_cdclk.h

+12 −12
Original line number Diff line number Diff line
@@ -11,9 +11,9 @@ 
#include "intel_display_limits.h"

#include "intel_global_state.h"



struct drm_i915_private;

struct intel_atomic_state;

struct intel_crtc_state;

struct intel_display;



struct intel_cdclk_config {

	unsigned int cdclk, vco, ref, bypass;
@@ -59,24 +59,24 @@ struct intel_cdclk_state { 
};



int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);

void intel_cdclk_init_hw(struct drm_i915_private *i915);

void intel_cdclk_uninit_hw(struct drm_i915_private *i915);

void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);

void intel_update_max_cdclk(struct drm_i915_private *dev_priv);

void intel_update_cdclk(struct drm_i915_private *dev_priv);

u32 intel_read_rawclk(struct drm_i915_private *dev_priv);

void intel_cdclk_init_hw(struct intel_display *display);

void intel_cdclk_uninit_hw(struct intel_display *display);

void intel_init_cdclk_hooks(struct intel_display *display);

void intel_update_max_cdclk(struct intel_display *display);

void intel_update_cdclk(struct intel_display *display);

u32 intel_read_rawclk(struct intel_display *display);

bool intel_cdclk_clock_changed(const struct intel_cdclk_config *a,

			       const struct intel_cdclk_config *b);

int intel_mdclk_cdclk_ratio(struct drm_i915_private *i915,

int intel_mdclk_cdclk_ratio(struct intel_display *display,

			    const struct intel_cdclk_config *cdclk_config);

bool intel_cdclk_is_decreasing_later(struct intel_atomic_state *state);

void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state);

void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state);

void intel_cdclk_dump_config(struct drm_i915_private *i915,

void intel_cdclk_dump_config(struct intel_display *display,

			     const struct intel_cdclk_config *cdclk_config,

			     const char *context);

int intel_modeset_calc_cdclk(struct intel_atomic_state *state);

void intel_cdclk_get_cdclk(struct drm_i915_private *dev_priv,

void intel_cdclk_get_cdclk(struct intel_display *display,

			   struct intel_cdclk_config *cdclk_config);

int intel_cdclk_atomic_check(struct intel_atomic_state *state,

			     bool *need_cdclk_calc);
@@ -92,7 +92,7 @@ intel_atomic_get_cdclk_state(struct intel_atomic_state *state); 
#define intel_atomic_get_new_cdclk_state(state) \

	to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->cdclk.obj))



int intel_cdclk_init(struct drm_i915_private *dev_priv);

void intel_cdclk_debugfs_register(struct drm_i915_private *i915);

int intel_cdclk_init(struct intel_display *display);

void intel_cdclk_debugfs_register(struct intel_display *display);



#endif /* __INTEL_CDCLK_H__ */

drivers/gpu/drm/i915/display/intel_display_debugfs.c

+1 −1
Original line number Diff line number Diff line
@@ -1068,7 +1068,7 @@ void intel_display_debugfs_register(struct drm_i915_private *i915) 
				 minor->debugfs_root, minor);



	intel_bios_debugfs_register(display);

	intel_cdclk_debugfs_register(i915);

	intel_cdclk_debugfs_register(display);

	intel_dmc_debugfs_register(i915);

	intel_fbc_debugfs_register(display);

	intel_hpd_debugfs_register(i915);

drivers/gpu/drm/i915/display/intel_display_device.c

+2 −1
Original line number Diff line number Diff line
@@ -1532,6 +1532,7 @@ void intel_display_device_remove(struct drm_i915_private *i915) 


static void __intel_display_device_info_runtime_init(struct drm_i915_private *i915)

{

	struct intel_display *display = &i915->display;

	struct intel_display_runtime_info *display_runtime = DISPLAY_RUNTIME_INFO(i915);

	enum pipe pipe;
@@ -1678,7 +1679,7 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9 
		}

	}



	display_runtime->rawclk_freq = intel_read_rawclk(i915);

	display_runtime->rawclk_freq = intel_read_rawclk(display);

	drm_dbg_kms(&i915->drm, "rawclk rate: %d kHz\n", display_runtime->rawclk_freq);



	return;

drivers/gpu/drm/i915/display/intel_display_driver.c

+9 −8
Original line number Diff line number Diff line
@@ -82,16 +82,17 @@ bool intel_display_driver_probe_defer(struct pci_dev *pdev) 


void intel_display_driver_init_hw(struct drm_i915_private *i915)

{

	struct intel_display *display = &i915->display;

	struct intel_cdclk_state *cdclk_state;



	if (!HAS_DISPLAY(i915))

		return;



	cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state);

	cdclk_state = to_intel_cdclk_state(display->cdclk.obj.state);



	intel_update_cdclk(i915);

	intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK");

	cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw;

	intel_update_cdclk(display);

	intel_cdclk_dump_config(display, &display->cdclk.hw, "Current CDCLK");

	cdclk_state->logical = cdclk_state->actual = display->cdclk.hw;



	intel_display_wa_apply(i915);

}
@@ -194,7 +195,7 @@ void intel_display_driver_early_probe(struct drm_i915_private *i915) 
	intel_display_irq_init(i915);

	intel_dkl_phy_init(i915);

	intel_color_init_hooks(i915);

	intel_init_cdclk_hooks(i915);

	intel_init_cdclk_hooks(&i915->display);

	intel_audio_hooks_init(i915);

	intel_dpll_init_clock_hook(i915);

	intel_init_display_hooks(i915);
@@ -244,7 +245,7 @@ int intel_display_driver_probe_noirq(struct drm_i915_private *i915) 


	intel_mode_config_init(i915);



	ret = intel_cdclk_init(i915);

	ret = intel_cdclk_init(display);

	if (ret)

		goto cleanup_vga_client_pw_domain_dmc;
@@ -451,8 +452,8 @@ int intel_display_driver_probe_nogem(struct drm_i915_private *i915) 
	intel_display_driver_init_hw(i915);

	intel_dpll_update_ref_clks(i915);



	if (i915->display.cdclk.max_cdclk_freq == 0)

		intel_update_max_cdclk(i915);

	if (display->cdclk.max_cdclk_freq == 0)

		intel_update_max_cdclk(display);



	intel_hti_init(display);