Commit d34b59d5 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Add skl_wm_plane_disable_noatomic() 



Add skl_wm_plane_disable_noatomic() which will clear out all
the ddb and wm state for the plane. And let's do this _before_
we call plane->disable_arm() so that it'll actually clear out
the state in the hardware as well.

Currently this won't do anything new for most of the
intel_plane_disable_noatomic() calls since those are done before
wm readout, and thus everything wm/ddb related in the state
will still be zeroed anyway. The only difference will be for
skl_dbuf_sanitize() is happens after wm readout. But I'll be
reordering thigns so that wm readout happens earlier and at that
point this will guarantee that we still clear out the old
wm/ddb junk from the state.

Reviewed-by: default avatarVinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250306163420.3961-8-ville.syrjala@linux.intel.com
parent 1dc6076c

drivers/gpu/drm/i915/display/intel_display.c

+2 −0
Original line number Diff line number Diff line
@@ -678,6 +678,8 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc, 
	intel_set_plane_visible(crtc_state, plane_state, false);

	intel_plane_fixup_bitmasks(crtc_state);



	skl_wm_plane_disable_noatomic(crtc, plane);



	if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 &&

	    hsw_ips_disable(crtc_state)) {

		crtc_state->ips_enabled = false;

drivers/gpu/drm/i915/display/skl_watermark.c

+22 −0
Original line number Diff line number Diff line
@@ -3867,6 +3867,28 @@ void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc) 
	memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));

}



void skl_wm_plane_disable_noatomic(struct intel_crtc *crtc,

				   struct intel_plane *plane)

{

	struct intel_display *display = to_intel_display(crtc);

	struct intel_crtc_state *crtc_state =

		to_intel_crtc_state(crtc->base.state);



	if (DISPLAY_VER(display) < 9)

		return;



	skl_ddb_entry_init(&crtc_state->wm.skl.plane_ddb[plane->id], 0, 0);

	skl_ddb_entry_init(&crtc_state->wm.skl.plane_ddb[plane->id], 0, 0);



	crtc_state->wm.skl.plane_min_ddb[plane->id] = 0;

	crtc_state->wm.skl.plane_interim_ddb[plane->id] = 0;



	memset(&crtc_state->wm.skl.raw.planes[plane->id], 0,

	       sizeof(crtc_state->wm.skl.raw.planes[plane->id]));

	memset(&crtc_state->wm.skl.optimal.planes[plane->id], 0,

	       sizeof(crtc_state->wm.skl.optimal.planes[plane->id]));

}



void intel_wm_state_verify(struct intel_atomic_state *state,

			   struct intel_crtc *crtc)

{

drivers/gpu/drm/i915/display/skl_watermark.h

+2 −0
Original line number Diff line number Diff line
@@ -42,6 +42,8 @@ void intel_wm_state_verify(struct intel_atomic_state *state, 
			   struct intel_crtc *crtc);



void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc);

void skl_wm_plane_disable_noatomic(struct intel_crtc *crtc,

				   struct intel_plane *plane);



void skl_watermark_ipc_init(struct drm_i915_private *i915);

void skl_watermark_ipc_update(struct drm_i915_private *i915);