Commit d370a9db authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/psr: PSR2_CTL[Block Count Number] not needed for LunarLake 



PSR2_CTL[Block Count Number] is not used by LunarLake do not configure it.

Bspec: 69885

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517073005.2414293-4-jouni.hogander@intel.com
parent 30dee753

drivers/gpu/drm/i915/display/intel_psr.c

+1 −1
Original line number Diff line number Diff line
@@ -927,7 +927,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) 


	val |= intel_psr2_get_tp_time(intel_dp);



	if (DISPLAY_VER(dev_priv) >= 12) {

	if (DISPLAY_VER(dev_priv) >= 12 && DISPLAY_VER(dev_priv) < 20) {

		if (psr2_block_count(intel_dp) > 2)

			val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_3;

		else