Unverified Commit d38e2e7b authored by Vincent Chen's avatar Vincent Chen Committed by Palmer Dabbelt
Browse files

clocksource: extend the max_delta_ns of timer-riscv and timer-clint to ULONG_MAX 



When registering the riscv-timer or clint-timer as a clock_event device,
the driver needs to specify the value of max_delta_ticks. This value
directly influences the max_delta_ns, which represents the maximum time
interval for configuring subsequent clock events. Currently, both
riscv-timer and clint-timer are set with a max_delta_ticks value of
0x7fff_ffff. When the timer operates at a high frequency, this values
limists the system to sleep only for a short time. For the 1GHz case,
the sleep cannot exceed two seconds. To address this limitation, refer to
other timer implementations to extend it to 2^(bit-width of the timer) - 1.
Because the bit-width of $mtimecmp is 64bit, this value becomes ULONG_MAX
(0xffff_ffff_ffff_ffff).

Signed-off-by: default avatarVincent Chen <vincent.chen@sifive.com>
Link: https://lore.kernel.org/r/20230905070945.404653-1-vincent.chen@sifive.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 67daf842

drivers/clocksource/timer-clint.c

+1 −1
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ static int clint_timer_starting_cpu(unsigned int cpu) 
	struct clock_event_device *ce = per_cpu_ptr(&clint_clock_event, cpu);



	ce->cpumask = cpumask_of(cpu);

	clockevents_config_and_register(ce, clint_timer_freq, 100, 0x7fffffff);

	clockevents_config_and_register(ce, clint_timer_freq, 100, ULONG_MAX);



	enable_percpu_irq(clint_timer_irq,

			  irq_get_trigger_type(clint_timer_irq));

drivers/clocksource/timer-riscv.c

+1 −1
Original line number Diff line number Diff line
@@ -114,7 +114,7 @@ static int riscv_timer_starting_cpu(unsigned int cpu) 
		ce->features |= CLOCK_EVT_FEAT_C3STOP;

	if (static_branch_likely(&riscv_sstc_available))

		ce->rating = 450;

	clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);

	clockevents_config_and_register(ce, riscv_timebase, 100, ULONG_MAX);



	enable_percpu_irq(riscv_clock_event_irq,

			  irq_get_trigger_type(riscv_clock_event_irq));