Commit d3c49299 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

pinctrl: renesas: rzg2l: Simplify rzg2l_gpio_irq_{en,dis}able() 



Simplify rzg2l_gpio_irq_{en,dis}able() by adding a helper function
rzg2l_gpio_irq_endisable().

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240206135115.151218-3-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 2fd4fe19

drivers/pinctrl/renesas/pinctrl-rzg2l.c

+16 −24
Original line number Diff line number Diff line
@@ -1809,11 +1809,9 @@ static int rzg2l_gpio_get_gpioint(unsigned int virq, struct rzg2l_pinctrl *pctrl 
	return gpioint;

}



static void rzg2l_gpio_irq_disable(struct irq_data *d)

static void rzg2l_gpio_irq_endisable(struct rzg2l_pinctrl *pctrl,

				     unsigned int hwirq, bool enable)

{

	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);

	struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip);

	unsigned int hwirq = irqd_to_hwirq(d);

	const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[hwirq];

	u64 *pin_data = pin_desc->drv_data;

	u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
@@ -1821,8 +1819,6 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d) 
	unsigned long flags;

	void __iomem *addr;



	irq_chip_disable_parent(d);



	addr = pctrl->base + ISEL(off);

	if (bit >= 4) {

		bit -= 4;
@@ -1830,9 +1826,21 @@ static void rzg2l_gpio_irq_disable(struct irq_data *d) 
	}



	spin_lock_irqsave(&pctrl->lock, flags);

	if (enable)

		writel(readl(addr) | BIT(bit * 8), addr);

	else

		writel(readl(addr) & ~BIT(bit * 8), addr);

	spin_unlock_irqrestore(&pctrl->lock, flags);

}



static void rzg2l_gpio_irq_disable(struct irq_data *d)

{

	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);

	struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip);

	unsigned int hwirq = irqd_to_hwirq(d);



	irq_chip_disable_parent(d);

	rzg2l_gpio_irq_endisable(pctrl, hwirq, false);

	gpiochip_disable_irq(gc, hwirq);

}
@@ -1841,25 +1849,9 @@ static void rzg2l_gpio_irq_enable(struct irq_data *d) 
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);

	struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip);

	unsigned int hwirq = irqd_to_hwirq(d);

	const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[hwirq];

	u64 *pin_data = pin_desc->drv_data;

	u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);

	u8 bit = RZG2L_PIN_ID_TO_PIN(hwirq);

	unsigned long flags;

	void __iomem *addr;



	gpiochip_enable_irq(gc, hwirq);



	addr = pctrl->base + ISEL(off);

	if (bit >= 4) {

		bit -= 4;

		addr += 4;

	}



	spin_lock_irqsave(&pctrl->lock, flags);

	writel(readl(addr) | BIT(bit * 8), addr);

	spin_unlock_irqrestore(&pctrl->lock, flags);



	rzg2l_gpio_irq_endisable(pctrl, hwirq, true);

	irq_chip_enable_parent(d);

}