Commit d3f8a9eb authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amdgpu: disable rlc fw info print 



Disable to print RLC v2_5 related firmware information by default.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 57f765a7

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c

+8 −8
Original line number Diff line number Diff line
@@ -291,22 +291,22 @@ void amdgpu_ucode_print_rlc_hdr(const struct common_firmware_header *hdr) 
			break;

		case 5:

			/* rlc_hdr v2_5 */

			DRM_INFO("rlc_iram_ucode_size_bytes: %u\n",

			DRM_DEBUG("rlc_iram_ucode_size_bytes: %u\n",

				  le32_to_cpu(rlc_hdr_v2_5->v2_2.rlc_iram_ucode_size_bytes));

			DRM_INFO("rlc_iram_ucode_offset_bytes: %u\n",

			DRM_DEBUG("rlc_iram_ucode_offset_bytes: %u\n",

				  le32_to_cpu(rlc_hdr_v2_5->v2_2.rlc_iram_ucode_offset_bytes));

			DRM_INFO("rlc_dram_ucode_size_bytes: %u\n",

			DRM_DEBUG("rlc_dram_ucode_size_bytes: %u\n",

				  le32_to_cpu(rlc_hdr_v2_5->v2_2.rlc_dram_ucode_size_bytes));

			DRM_INFO("rlc_dram_ucode_offset_bytes: %u\n",

			DRM_DEBUG("rlc_dram_ucode_offset_bytes: %u\n",

				  le32_to_cpu(rlc_hdr_v2_5->v2_2.rlc_dram_ucode_offset_bytes));

			/* rlc_hdr v2_5 */

			DRM_INFO("rlc_1_iram_ucode_size_bytes: %u\n",

			DRM_DEBUG("rlc_1_iram_ucode_size_bytes: %u\n",

				  le32_to_cpu(rlc_hdr_v2_5->rlc_1_iram_ucode_size_bytes));

			DRM_INFO("rlc_1_iram_ucode_offset_bytes: %u\n",

			DRM_DEBUG("rlc_1_iram_ucode_offset_bytes: %u\n",

				  le32_to_cpu(rlc_hdr_v2_5->rlc_1_iram_ucode_offset_bytes));

			DRM_INFO("rlc_1_dram_ucode_size_bytes: %u\n",

			DRM_DEBUG("rlc_1_dram_ucode_size_bytes: %u\n",

				  le32_to_cpu(rlc_hdr_v2_5->rlc_1_dram_ucode_size_bytes));

			DRM_INFO("rlc_1_dram_ucode_offset_bytes: %u\n",

			DRM_DEBUG("rlc_1_dram_ucode_offset_bytes: %u\n",

				  le32_to_cpu(rlc_hdr_v2_5->rlc_1_dram_ucode_offset_bytes));

			break;

		default: