Commit d41e5839 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'cxl-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl 

Pull CXL updates from Dave Jiang:
 "The most significant changes in this pull request is the series that
  introduces ACQUIRE() and ACQUIRE_ERR() macros to replace conditional
  locking and ease the pain points of scoped_cond_guard().

  The series also includes follow on changes that refactor the CXL
  sub-system to utilize the new macros.

  Detail summary:

   - Add documentation template for CXL conventions to document CXL
     platform quirks

   - Replace mutex_lock_io() with mutex_lock() for mailbox

   - Add location limit for fake CFMWS range for cxl_test, ARM platform
     enabling

   - CXL documentation typo and clarity fixes

   - Use correct format specifier for function cxl_set_ecs_threshold()

   - Make cxl_bus_type constant

   - Introduce new helper cxl_resource_contains_addr() to check address
     availability

   - Fix wrong DPA checking for PPR operation

   - Remove core/acpi.c and CXL core dependency on ACPI

   - Introduce ACQUIRE() and ACQUIRE_ERR() for conditional locks

   - Add CXL updates utilizing ACQUIRE() macro to remove gotos and
     improve readability

   - Add return for the dummy version of cxl_decoder_detach() without
     CONFIG_CXL_REGION

   - CXL events updates for spec r3.2

   - Fix return of __cxl_decoder_detach() error path

   - CXL debugfs documentation fix"

* tag 'cxl-for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (28 commits)
  Documentation/ABI/testing/debugfs-cxl: Add 'cxl' to clear_poison path
  cxl/region: Fix an ERR_PTR() vs NULL bug
  cxl/events: Trace Memory Sparing Event Record
  cxl/events: Add extra validity checks for CVME count in DRAM Event Record
  cxl/events: Add extra validity checks for corrected memory error count in General Media Event Record
  cxl/events: Update Common Event Record to CXL spec rev 3.2
  cxl: Fix -Werror=return-type in cxl_decoder_detach()
  cleanup: Fix documentation build error for ACQUIRE updates
  cxl: Convert to ACQUIRE() for conditional rwsem locking
  cxl/region: Consolidate cxl_decoder_kill_region() and cxl_region_detach()
  cxl/region: Move ready-to-probe state check to a helper
  cxl/region: Split commit_store() into __commit() and queue_reset() helpers
  cxl/decoder: Drop pointless locking
  cxl/decoder: Move decoder register programming to a helper
  cxl/mbox: Convert poison list mutex to ACQUIRE()
  cleanup: Introduce ACQUIRE() and ACQUIRE_ERR() for conditional locks
  cxl: Remove core/acpi.c and cxl core dependency on ACPI
  cxl/core: Using cxl_resource_contains_addr() to check address availability
  cxl/edac: Fix wrong dpa checking for PPR operation
  cxl/core: Introduce a new helper cxl_resource_contains_addr()
  ...
parents 11185742 f11a5f89

Documentation/ABI/testing/debugfs-cxl

+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ Description: 
		visible for devices supporting the capability.





What:		/sys/kernel/debug/memX/clear_poison

What:		/sys/kernel/debug/cxl/memX/clear_poison

Date:		April, 2023

KernelVersion:	v6.4

Contact:	linux-cxl@vger.kernel.org

Documentation/driver-api/cxl/conventions.rst

0 → 100644
+47 −0
Original line number Diff line number Diff line 
.. SPDX-License-Identifier: GPL-2.0

.. include:: <isonum.txt>



=======================================

Compute Express Link: Linux Conventions

=======================================



There exists shipping platforms that bend or break CXL specification

expectations. Record the details and the rationale for those deviations.

Borrow the ACPI Code First template format to capture the assumptions

and tradeoffs such that multiple platform implementations can follow the

same convention.



<(template) Title>

==================



Document

--------

CXL Revision <rev>, Version <ver>



License

-------

SPDX-License Identifier: CC-BY-4.0



Creator/Contributors

--------------------



Summary of the Change

---------------------



<Detail the conflict with the specification and where available the

assumptions and tradeoffs taken by the hardware platform.>





Benefits of the Change

----------------------



<Detail what happens if platforms and Linux do not adopt this

convention.>



References

----------



Detailed Description of the Change

----------------------------------



<Propose spec language that corrects the conflict.>

Documentation/driver-api/cxl/devices/device-types.rst

+5 −5
Original line number Diff line number Diff line
@@ -63,13 +63,13 @@ A Type-2 CXL Device: 


* Supports cxl.io, cxl.cache, and cxl.mem protocols

* Optionally implements coherent cache and Host-Managed Device Memory

* Is typically an accelerator device w/ high bandwidth memory.

* Is typically an accelerator device with high bandwidth memory.



The primary difference between a type-1 and type-2 device is the presence

of host-managed device memory, which allows the device to operate on a

local memory bank - while the CPU sill has coherent DMA to the same memory.

local memory bank - while the CPU still has coherent DMA to the same memory.



The allows things like GPUs to expose their memory via DAX devices or file

This allows things like GPUs to expose their memory via DAX devices or file

descriptors, allows drivers and programs direct access to device memory

rather than use block-transfer semantics.
@@ -89,7 +89,7 @@ basic coherent DMA. 
Switch

------



A CXL switch is a device capacity of routing any CXL (and by extension, PCIe)

A CXL switch is a device capable of routing any CXL (and by extension, PCIe)

protocol between an upstream, downstream, or peer devices.  Many devices, such

as Multi-Logical Devices, imply the presence of switching in some manner.
@@ -103,7 +103,7 @@ A Single-Logical Device (SLD) is a device which presents a single device to 
one or more heads.



A Multi-Logical Device (MLD) is a device which may present multiple devices

to one or more devices.

to one or more upstream devices.



A Single-Headed Device exposes only a single physical connection.

Documentation/driver-api/cxl/index.rst

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ that have impacts on each other. The docs here break up configurations steps. 


   theory-of-operation

   maturity-map

   conventions



.. toctree::

   :maxdepth: 2

Documentation/driver-api/cxl/linux/cxl-driver.rst

+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ The CXL driver is split into a number of drivers. 
* cxl_port  - initializes root and provides port enumeration interface.

* cxl_acpi  - initializes root decoders and interacts with ACPI data.

* cxl_p/mem - initializes memory devices

* cxl_pci   - uses cxl_port to enumates the actual fabric hierarchy.

* cxl_pci   - uses cxl_port to enumerate the actual fabric hierarchy.



Driver Devices

==============