Commit d42b2331 authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher
Browse files

drm/amd/display: Update DMCUB loading sequence for DCN3.5 



[Why]
New sequence from HW for reset and firmware reloading has been
provided that aims to stabilize the reload sequence in the case the
firmware is hung or has outstanding requests.

[How]
Update the sequence to remove the DMUIF reset and the redundant
writes in the release.

Reviewed-by: default avatarOvidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarWayne Lin <wayne.lin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent aca63ca8

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

+3 −13
Original line number Diff line number Diff line
@@ -92,19 +92,15 @@ void dmub_dcn35_reset(struct dmub_srv *dmub) 
	uint32_t in_reset, is_enabled, scratch, i, pwait_mode;



	REG_GET(DMCUB_CNTL2, DMCUB_SOFT_RESET, &in_reset);

	REG_GET(DMCUB_CNTL, DMCUB_ENABLE, &is_enabled);



	if (in_reset == 0) {

	if (in_reset == 0 && is_enabled != 0) {

		cmd.bits.status = 1;

		cmd.bits.command_code = DMUB_GPINT__STOP_FW;

		cmd.bits.param = 0;



		dmub->hw_funcs.set_gpint(dmub, cmd);



		/**

		 * Timeout covers both the ACK and the wait

		 * for remaining work to finish.

		 */



		for (i = 0; i < timeout; ++i) {

			if (dmub->hw_funcs.is_gpint_acked(dmub, cmd))

				break;
@@ -130,11 +126,9 @@ void dmub_dcn35_reset(struct dmub_srv *dmub) 
		/* Force reset in case we timed out, DMCUB is likely hung. */

	}



	REG_GET(DMCUB_CNTL, DMCUB_ENABLE, &is_enabled);



	if (is_enabled) {

		REG_UPDATE(DMCUB_CNTL2, DMCUB_SOFT_RESET, 1);

		REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 1);

		udelay(1);

		REG_UPDATE(DMCUB_CNTL, DMCUB_ENABLE, 0);

	}
@@ -160,11 +154,7 @@ void dmub_dcn35_reset_release(struct dmub_srv *dmub) 
		     LONO_SOCCLK_GATE_DISABLE, 1,

		     LONO_DMCUBCLK_GATE_DISABLE, 1);



	REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 1);

	udelay(1);

	REG_UPDATE_2(DMCUB_CNTL, DMCUB_ENABLE, 1, DMCUB_TRACEPORT_EN, 1);

	REG_UPDATE(DMCUB_CNTL2, DMCUB_SOFT_RESET, 1);

	udelay(1);

	REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 0);

	REG_UPDATE(DMCUB_CNTL2, DMCUB_SOFT_RESET, 0);

}