Commit d4550f58 authored by Janusz Krzysztofik's avatar Janusz Krzysztofik Committed by Andi Shyti
Browse files

drm/i915: Wait for page_sizes_gtt in gtt selftest on CHV/BXT+VTD 



VMA pinning to GGTT is now commited asynchronously in CHV / BXT+VDT
environments to avoid lock inversion among reservation_ww and cpu_hotplug
locks, the latter acquired from stop_machine().  Then,
vma->resource->page_sizes_gtt the test uses as shift count may still be
not populated (equal 0) after i915_vma_pin() returns.  Wait for VMA bind
completion in those cases to avoid shift-out-of-bounds kernel warnings and
the test case failing with -EBADSLT.

v2: Explain why VMA pinning is commited asynchronously on CHV/BXT+VTD
    (Krzysztof),
  - use more precise wording in commit description.

Signed-off-by: default avatarJanusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Reviewed-by: default avatarSebastian Brzezinka <sebastian.brzezinka@intel.com>
Reviewed-by: default avatarKrzysztof Karas <krzysztof.karas@intel.com>
Acked-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Link: https://lore.kernel.org/r/20251023082925.351307-8-janusz.krzysztofik@linux.intel.com
parent 86ef67db

drivers/gpu/drm/i915/selftests/i915_gem_gtt.c

+4 −0
Original line number Diff line number Diff line
@@ -1118,6 +1118,10 @@ static int misaligned_case(struct i915_address_space *vm, struct intel_memory_re 
		goto err_put;

	}



	/* make sure page_sizes_gtt has been populated before use */

	if (i915_is_ggtt(vm) && intel_vm_no_concurrent_access_wa(vm->i915))

		i915_vma_wait_for_bind(vma);



	expected_vma_size = round_up(size, 1 << (ffs(vma->resource->page_sizes_gtt) - 1));

	expected_node_size = expected_vma_size;