Loading drivers/clk/clk-divider.c +0 −22 Original line number Diff line number Diff line Loading @@ -387,28 +387,6 @@ int divider_ro_determine_rate(struct clk_hw *hw, struct clk_rate_request *req, } EXPORT_SYMBOL_GPL(divider_ro_determine_rate); long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags) { struct clk_rate_request req; int ret; clk_hw_init_rate_request(hw, &req, rate); req.best_parent_rate = *prate; req.best_parent_hw = parent; ret = divider_determine_rate(hw, &req, table, width, flags); if (ret) return ret; *prate = req.best_parent_rate; return req.rate; } EXPORT_SYMBOL_GPL(divider_round_rate_parent); static int clk_divider_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { Loading include/linux/clk-provider.h +0 −13 Original line number Diff line number Diff line Loading @@ -733,10 +733,6 @@ extern const struct clk_ops clk_divider_ro_ops; unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, unsigned int val, const struct clk_div_table *table, unsigned long flags, unsigned long width); long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags); int divider_determine_rate(struct clk_hw *hw, struct clk_rate_request *req, const struct clk_div_table *table, u8 width, unsigned long flags); Loading Loading @@ -1427,15 +1423,6 @@ static inline void __clk_hw_set_clk(struct clk_hw *dst, struct clk_hw *src) dst->core = src->core; } static inline long divider_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags) { return divider_round_rate_parent(hw, clk_hw_get_parent(hw), rate, prate, table, width, flags); } /* * FIXME clock api without lock protection */ Loading Loading
drivers/clk/clk-divider.c +0 −22 Original line number Diff line number Diff line Loading @@ -387,28 +387,6 @@ int divider_ro_determine_rate(struct clk_hw *hw, struct clk_rate_request *req, } EXPORT_SYMBOL_GPL(divider_ro_determine_rate); long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags) { struct clk_rate_request req; int ret; clk_hw_init_rate_request(hw, &req, rate); req.best_parent_rate = *prate; req.best_parent_hw = parent; ret = divider_determine_rate(hw, &req, table, width, flags); if (ret) return ret; *prate = req.best_parent_rate; return req.rate; } EXPORT_SYMBOL_GPL(divider_round_rate_parent); static int clk_divider_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { Loading
include/linux/clk-provider.h +0 −13 Original line number Diff line number Diff line Loading @@ -733,10 +733,6 @@ extern const struct clk_ops clk_divider_ro_ops; unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, unsigned int val, const struct clk_div_table *table, unsigned long flags, unsigned long width); long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags); int divider_determine_rate(struct clk_hw *hw, struct clk_rate_request *req, const struct clk_div_table *table, u8 width, unsigned long flags); Loading Loading @@ -1427,15 +1423,6 @@ static inline void __clk_hw_set_clk(struct clk_hw *dst, struct clk_hw *src) dst->core = src->core; } static inline long divider_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate, const struct clk_div_table *table, u8 width, unsigned long flags) { return divider_round_rate_parent(hw, clk_hw_get_parent(hw), rate, prate, table, width, flags); } /* * FIXME clock api without lock protection */ Loading