Commit d4e3fc4f authored by Karthikeyan Periyasamy's avatar Karthikeyan Periyasamy Committed by Kalle Valo
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wifi: ath12k: Refactor data path cmem init 



Move the data path Tx and Rx descriptor primary page table CMEM
configuration into a helper function. This will make the code more
scalable for configuring partner device in support of multi-device MLO.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00188-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3

Signed-off-by: default avatarKarthikeyan Periyasamy <quic_periyasa@quicinc.com>
Acked-by: default avatarJeff Johnson <quic_jjohnson@quicinc.com>
Signed-off-by: default avatarKalle Valo <quic_kvalo@quicinc.com>
Link: https://msgid.link/20240411102226.4045323-5-quic_periyasa@quicinc.com
parent 682ca418

drivers/net/wireless/ath/ath12k/dp.c

+47 −6
Original line number Diff line number Diff line
@@ -14,6 +14,11 @@ 
#include "peer.h"

#include "dp_mon.h"



enum ath12k_dp_desc_type {

	ATH12K_DP_TX_DESC,

	ATH12K_DP_RX_DESC,

};



static void ath12k_dp_htt_htc_tx_complete(struct ath12k_base *ab,

					  struct sk_buff *skb)

{
@@ -1455,11 +1460,41 @@ static int ath12k_dp_cc_desc_init(struct ath12k_base *ab) 
	return 0;

}



static int ath12k_dp_cmem_init(struct ath12k_base *ab,

			       struct ath12k_dp *dp,

			       enum ath12k_dp_desc_type type)

{

	u32 cmem_base;

	int i, start, end;



	cmem_base = ab->qmi.dev_mem[ATH12K_QMI_DEVMEM_CMEM_INDEX].start;



	switch (type) {

	case ATH12K_DP_TX_DESC:

		start = ATH12K_TX_SPT_PAGE_OFFSET;

		end = start + ATH12K_NUM_TX_SPT_PAGES;

		break;

	case ATH12K_DP_RX_DESC:

		start = ATH12K_RX_SPT_PAGE_OFFSET;

		end = start + ATH12K_NUM_RX_SPT_PAGES;

		break;

	default:

		ath12k_err(ab, "invalid descriptor type %d in cmem init\n", type);

		return -EINVAL;

	}



	/* Write to PPT in CMEM */

	for (i = start; i < end; i++)

		ath12k_hif_write32(ab, cmem_base + ATH12K_PPT_ADDR_OFFSET(i),

				   dp->spt_info[i].paddr >> ATH12K_SPT_4K_ALIGN_OFFSET);



	return 0;

}



static int ath12k_dp_cc_init(struct ath12k_base *ab)

{

	struct ath12k_dp *dp = &ab->dp;

	int i, ret = 0;

	u32 cmem_base;



	INIT_LIST_HEAD(&dp->rx_desc_free_list);

	spin_lock_init(&dp->rx_desc_lock);
@@ -1482,8 +1517,6 @@ static int ath12k_dp_cc_init(struct ath12k_base *ab) 
		return -ENOMEM;

	}



	cmem_base = ab->qmi.dev_mem[ATH12K_QMI_DEVMEM_CMEM_INDEX].start;



	for (i = 0; i < dp->num_spt_pages; i++) {

		dp->spt_info[i].vaddr = dma_alloc_coherent(ab->dev,

							   ATH12K_PAGE_SIZE,
@@ -1500,10 +1533,18 @@ static int ath12k_dp_cc_init(struct ath12k_base *ab) 
			ret = -EINVAL;

			goto free;

		}

	}



		/* Write to PPT in CMEM */

		ath12k_hif_write32(ab, cmem_base + ATH12K_PPT_ADDR_OFFSET(i),

				   dp->spt_info[i].paddr >> ATH12K_SPT_4K_ALIGN_OFFSET);

	ret = ath12k_dp_cmem_init(ab, dp, ATH12K_DP_TX_DESC);

	if (ret) {

		ath12k_warn(ab, "HW CC Tx cmem init failed %d", ret);

		goto free;

	}



	ret = ath12k_dp_cmem_init(ab, dp, ATH12K_DP_RX_DESC);

	if (ret) {

		ath12k_warn(ab, "HW CC Rx cmem init failed %d", ret);

		goto free;

	}



	ret = ath12k_dp_cc_desc_init(ab);