Commit d551d2e8 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2026-03-19' of... 

Merge tag 'drm-intel-fixes-2026-03-19' of https://gitlab.freedesktop.org/drm/i915/kernel

 into drm-fixes

- Fix #15771: Screen corruption and stuttering on P14s w/ 3K display
- Fix for PSR entry setup frames count on rejected commit
- Fix OOPS if firmware is not loaded and suspend is attempted
- Fix unlikely NULL deref due to DC6 on probe

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patch.msgid.link/abujAnD-lRDCVSKg@jlahtine-mobl
parents f338e773 0162ab32

drivers/gpu/drm/i915/display/intel_display_power_well.c

+1 −1
Original line number Diff line number Diff line
@@ -806,7 +806,7 @@ void gen9_set_dc_state(struct intel_display *display, u32 state) 
			power_domains->dc_state, val & mask);



	enable_dc6 = state & DC_STATE_EN_UPTO_DC6;

	dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;

	dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;

	if (!dc6_was_enabled && enable_dc6)

		intel_dmc_update_dc6_allowed_count(display, true);

drivers/gpu/drm/i915/display/intel_display_types.h

+1 −0
Original line number Diff line number Diff line
@@ -1186,6 +1186,7 @@ struct intel_crtc_state { 
	u32 dc3co_exitline;

	u16 su_y_granularity;

	u8 active_non_psr_pipes;

	u8 entry_setup_frames;

	const char *no_psr_reason;



	/*

drivers/gpu/drm/i915/display/intel_dmc.c

+1 −2
Original line number Diff line number Diff line
@@ -1599,8 +1599,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 * 
		return false;



	mutex_lock(&power_domains->lock);

	dc6_enabled = intel_de_read(display, DC_STATE_EN) &

		      DC_STATE_EN_UPTO_DC6;

	dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;

	if (dc6_enabled)

		intel_dmc_update_dc6_allowed_count(display, false);

drivers/gpu/drm/i915/display/intel_psr.c

+5 −2
Original line number Diff line number Diff line
@@ -1717,7 +1717,7 @@ static bool _psr_compute_config(struct intel_dp *intel_dp, 
	entry_setup_frames = intel_psr_entry_setup_frames(intel_dp, conn_state, adjusted_mode);



	if (entry_setup_frames >= 0) {

		intel_dp->psr.entry_setup_frames = entry_setup_frames;

		crtc_state->entry_setup_frames = entry_setup_frames;

	} else {

		crtc_state->no_psr_reason = "PSR setup timing not met";

		drm_dbg_kms(display->drm,
@@ -1815,7 +1815,7 @@ static bool intel_psr_needs_wa_18037818876(struct intel_dp *intel_dp, 
{

	struct intel_display *display = to_intel_display(intel_dp);



	return (DISPLAY_VER(display) == 20 && intel_dp->psr.entry_setup_frames > 0 &&

	return (DISPLAY_VER(display) == 20 && crtc_state->entry_setup_frames > 0 &&

		!crtc_state->has_sel_update);

}
@@ -2189,6 +2189,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, 
	intel_dp->psr.pkg_c_latency_used = crtc_state->pkg_c_latency_used;

	intel_dp->psr.io_wake_lines = crtc_state->alpm_state.io_wake_lines;

	intel_dp->psr.fast_wake_lines = crtc_state->alpm_state.fast_wake_lines;

	intel_dp->psr.entry_setup_frames = crtc_state->entry_setup_frames;



	if (!psr_interrupt_error_check(intel_dp))

		return;
@@ -3109,6 +3110,8 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, 
			 * - Display WA #1136: skl, bxt

			 */

			if (intel_crtc_needs_modeset(new_crtc_state) ||

			    new_crtc_state->update_m_n ||

			    new_crtc_state->update_lrr ||

			    !new_crtc_state->has_psr ||

			    !new_crtc_state->active_planes ||

			    new_crtc_state->has_sel_update != psr->sel_update_enabled ||

drivers/gpu/drm/i915/gt/intel_engine_cs.c

+2 −1
Original line number Diff line number Diff line
@@ -1967,6 +1967,7 @@ void intel_engines_reset_default_submission(struct intel_gt *gt) 
		if (engine->sanitize)

			engine->sanitize(engine);



		if (engine->set_default_submission)

			engine->set_default_submission(engine);

	}

}