Commit d5872aa2 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'bnxt_en-driver-update'

Michael Chan says:

====================
bnxt_en: Driver update

The first patch configures context memory for RoCE resources based
on FW limits.  The next 4 patches restrict certain ethtool
operations when they are not supported.  The last patch adds Pavan
Chebbi as co-maintainer of the driver.

v1: https://lore.kernel.org/20241215205943.2341612-1-michael.chan@broadcom.com
====================

Link: https://patch.msgid.link/20241217182620.2454075-1-michael.chan@broadcom.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 07e5c4eb 73df38b0
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+1 −0
Original line number Diff line number Diff line
@@ -4611,6 +4611,7 @@ F: drivers/net/ethernet/broadcom/bnx2x/
BROADCOM BNXT_EN 50 GIGABIT ETHERNET DRIVER
M:	Michael Chan <michael.chan@broadcom.com>
M:	Pavan Chebbi <pavan.chebbi@broadcom.com>
L:	netdev@vger.kernel.org
S:	Supported
F:	drivers/firmware/broadcom/tee_bnxt_fw.c
+58 −13
Original line number Diff line number Diff line
@@ -8279,16 +8279,20 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp)
	if (rc)
		goto func_qcfg_exit;

	flags = le16_to_cpu(resp->flags);
#ifdef CONFIG_BNXT_SRIOV
	if (BNXT_VF(bp)) {
		struct bnxt_vf_info *vf = &bp->vf;

		vf->vlan = le16_to_cpu(resp->vlan) & VLAN_VID_MASK;
		if (flags & FUNC_QCFG_RESP_FLAGS_TRUSTED_VF)
			vf->flags |= BNXT_VF_TRUST;
		else
			vf->flags &= ~BNXT_VF_TRUST;
	} else {
		bp->pf.registered_vfs = le16_to_cpu(resp->registered_vfs);
	}
#endif
	flags = le16_to_cpu(resp->flags);
	if (flags & (FUNC_QCFG_RESP_FLAGS_FW_DCBX_AGENT_ENABLED |
		     FUNC_QCFG_RESP_FLAGS_FW_LLDP_AGENT_ENABLED)) {
		bp->fw_cap |= BNXT_FW_CAP_LLDP_AGENT;
@@ -9117,10 +9121,18 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
	ena = 0;
	if ((bp->flags & BNXT_FLAG_ROCE_CAP) && !is_kdump_kernel()) {
		pg_lvl = 2;
		extra_qps = min_t(u32, 65536, max_qps - l2_qps - qp1_qps);
		/* allocate extra qps if fw supports RoCE fast qp destroy feature */
		if (BNXT_SW_RES_LMT(bp)) {
			extra_qps = max_qps - l2_qps - qp1_qps;
			extra_srqs = max_srqs - srqs;
		} else {
			extra_qps = min_t(u32, 65536,
					  max_qps - l2_qps - qp1_qps);
			/* allocate extra qps if fw supports RoCE fast qp
			 * destroy feature
			 */
			extra_qps += fast_qpmd_qps;
			extra_srqs = min_t(u32, 8192, max_srqs - srqs);
		}
		if (fast_qpmd_qps)
			ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_QP_FAST_QPMD;
	}
@@ -9156,6 +9168,11 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
		goto skip_rdma;

	ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV];
	if (BNXT_SW_RES_LMT(bp) &&
	    ctxm->split_entry_cnt == BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1) {
		num_ah = ctxm->mrav_av_entries;
		num_mr = ctxm->max_entries - num_ah;
	} else {
		/* 128K extra is needed to accommodate static AH context
		 * allocation by f/w.
		 */
@@ -9164,6 +9181,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
		ctxm->split_entry_cnt = BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1;
		if (!ctxm->mrav_av_entries || ctxm->mrav_av_entries > num_ah)
			ctxm->mrav_av_entries = num_ah;
	}

	rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, num_mr + num_ah, 2);
	if (rc)
@@ -9470,6 +9488,9 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
		bp->flags |= BNXT_FLAG_UDP_GSO_CAP;
	if (flags_ext2 & FUNC_QCAPS_RESP_FLAGS_EXT2_TX_PKT_TS_CMPL_SUPPORTED)
		bp->fw_cap |= BNXT_FW_CAP_TX_TS_CMP;
	if (flags_ext2 &
	    FUNC_QCAPS_RESP_FLAGS_EXT2_SW_MAX_RESOURCE_LIMITS_SUPPORTED)
		bp->fw_cap |= BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS;
	if (BNXT_PF(bp) &&
	    (flags_ext2 & FUNC_QCAPS_RESP_FLAGS_EXT2_ROCE_VF_RESOURCE_MGMT_SUPPORTED))
		bp->fw_cap |= BNXT_FW_CAP_ROCE_VF_RESC_MGMT_SUPPORTED;
@@ -11530,6 +11551,26 @@ static int bnxt_hwrm_phy_qcaps(struct bnxt *bp)
	return rc;
}

static void bnxt_hwrm_mac_qcaps(struct bnxt *bp)
{
	struct hwrm_port_mac_qcaps_output *resp;
	struct hwrm_port_mac_qcaps_input *req;
	int rc;

	if (bp->hwrm_spec_code < 0x10a03)
		return;

	rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_QCAPS);
	if (rc)
		return;

	resp = hwrm_req_hold(bp, req);
	rc = hwrm_req_send_silent(bp, req);
	if (!rc)
		bp->mac_flags = resp->flags;
	hwrm_req_drop(bp, req);
}

static bool bnxt_support_dropped(u16 advertising, u16 supported)
{
	u16 diff = advertising ^ supported;
@@ -15658,6 +15699,10 @@ static int bnxt_probe_phy(struct bnxt *bp, bool fw_dflt)
		bp->dev->priv_flags |= IFF_SUPP_NOFCS;
	else
		bp->dev->priv_flags &= ~IFF_SUPP_NOFCS;

	bp->mac_flags = 0;
	bnxt_hwrm_mac_qcaps(bp);

	if (!fw_dflt)
		return 0;

+13 −0
Original line number Diff line number Diff line
@@ -2270,6 +2270,11 @@ struct bnxt {

#define BNXT_PF(bp)		(!((bp)->flags & BNXT_FLAG_VF))
#define BNXT_VF(bp)		((bp)->flags & BNXT_FLAG_VF)
#ifdef CONFIG_BNXT_SRIOV
#define	BNXT_VF_IS_TRUSTED(bp)	((bp)->vf.flags & BNXT_VF_TRUST)
#else
#define	BNXT_VF_IS_TRUSTED(bp)	0
#endif
#define BNXT_NPAR(bp)		((bp)->port_partition_type)
#define BNXT_MH(bp)		((bp)->flags & BNXT_FLAG_MULTI_HOST)
#define BNXT_SINGLE_PF(bp)	(BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp))
@@ -2482,6 +2487,7 @@ struct bnxt {
	#define BNXT_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO	BIT_ULL(38)
	#define BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V3	BIT_ULL(39)
	#define BNXT_FW_CAP_VNIC_RE_FLUSH		BIT_ULL(40)
	#define BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS	BIT_ULL(41)

	u32			fw_dbg_cap;

@@ -2501,6 +2507,8 @@ struct bnxt {
	((bp)->fw_cap & BNXT_FW_CAP_ENABLE_RDMA_SRIOV)
#define BNXT_ROCE_VF_RESC_CAP(bp)	\
	((bp)->fw_cap & BNXT_FW_CAP_ROCE_VF_RESC_MGMT_SUPPORTED)
#define BNXT_SW_RES_LMT(bp)		\
	((bp)->fw_cap & BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS)

	u32			hwrm_spec_code;
	u16			hwrm_cmd_seq;
@@ -2660,6 +2668,11 @@ struct bnxt {
#define BNXT_PHY_FL_BANK_SEL		(PORT_PHY_QCAPS_RESP_FLAGS2_BANK_ADDR_SUPPORTED << 8)
#define BNXT_PHY_FL_SPEEDS2		(PORT_PHY_QCAPS_RESP_FLAGS2_SPEEDS2_SUPPORTED << 8)

	/* copied from flags in hwrm_port_mac_qcaps_output */
	u8			mac_flags;
#define BNXT_MAC_FL_NO_MAC_LPBK		\
	PORT_MAC_QCAPS_RESP_FLAGS_LOCAL_LPBK_NOT_SUPPORTED

	u8			num_tests;
	struct bnxt_test_info	*test_info;

+33 −11
Original line number Diff line number Diff line
@@ -2050,6 +2050,7 @@ static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
	int rc;

	regs->version = 0;
	if (!(bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_REG_ACCESS_RESTRICTED))
		bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);

	if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
@@ -4375,6 +4376,9 @@ static int bnxt_get_module_info(struct net_device *dev,
	struct bnxt *bp = netdev_priv(dev);
	int rc;

	if (BNXT_VF(bp) && !BNXT_VF_IS_TRUSTED(bp))
		return -EPERM;

	/* No point in going further if phy status indicates
	 * module is not inserted or if it is powered down or
	 * if it is of type 10GBase-T
@@ -4426,6 +4430,9 @@ static int bnxt_get_module_eeprom(struct net_device *dev,
	u16  start = eeprom->offset, length = eeprom->len;
	int rc = 0;

	if (BNXT_VF(bp) && !BNXT_VF_IS_TRUSTED(bp))
		return -EPERM;

	memset(data, 0, eeprom->len);

	/* Read A0 portion of the EEPROM */
@@ -4480,6 +4487,12 @@ static int bnxt_get_module_eeprom_by_page(struct net_device *dev,
	struct bnxt *bp = netdev_priv(dev);
	int rc;

	if (BNXT_VF(bp) && !BNXT_VF_IS_TRUSTED(bp)) {
		NL_SET_ERR_MSG_MOD(extack,
				   "Module read not permitted on untrusted VF");
		return -EPERM;
	}

	rc = bnxt_get_module_status(bp, extack);
	if (rc)
		return rc;
@@ -4887,35 +4900,44 @@ static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
		bnxt_close_nic(bp, true, false);
		bnxt_run_fw_tests(bp, test_mask, &test_results);

		buf[BNXT_MACLPBK_TEST_IDX] = 1;
		bnxt_hwrm_mac_loopback(bp, true);
		msleep(250);
		rc = bnxt_half_open_nic(bp);
		if (rc) {
			bnxt_hwrm_mac_loopback(bp, false);
			etest->flags |= ETH_TEST_FL_FAILED;
			return;
		}
		buf[BNXT_MACLPBK_TEST_IDX] = 1;
		if (bp->mac_flags & BNXT_MAC_FL_NO_MAC_LPBK)
			goto skip_mac_loopback;

		bnxt_hwrm_mac_loopback(bp, true);
		msleep(250);
		if (bnxt_run_loopback(bp))
			etest->flags |= ETH_TEST_FL_FAILED;
		else
			buf[BNXT_MACLPBK_TEST_IDX] = 0;

		bnxt_hwrm_mac_loopback(bp, false);
skip_mac_loopback:
		buf[BNXT_PHYLPBK_TEST_IDX] = 1;
		if (bp->phy_flags & BNXT_PHY_FL_NO_PHY_LPBK)
			goto skip_phy_loopback;

		bnxt_hwrm_phy_loopback(bp, true, false);
		msleep(1000);
		if (bnxt_run_loopback(bp)) {
			buf[BNXT_PHYLPBK_TEST_IDX] = 1;
		if (bnxt_run_loopback(bp))
			etest->flags |= ETH_TEST_FL_FAILED;
		}
		else
			buf[BNXT_PHYLPBK_TEST_IDX] = 0;
skip_phy_loopback:
		buf[BNXT_EXTLPBK_TEST_IDX] = 1;
		if (do_ext_lpbk) {
			etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
			bnxt_hwrm_phy_loopback(bp, true, true);
			msleep(1000);
			if (bnxt_run_loopback(bp)) {
				buf[BNXT_EXTLPBK_TEST_IDX] = 1;
			if (bnxt_run_loopback(bp))
				etest->flags |= ETH_TEST_FL_FAILED;
			}
			else
				buf[BNXT_EXTLPBK_TEST_IDX] = 0;
		}
		bnxt_hwrm_phy_loopback(bp, false, false);
		bnxt_half_close_nic(bp);
+2 −0
Original line number Diff line number Diff line
@@ -416,6 +416,8 @@ static void bnxt_set_edev_info(struct bnxt_en_dev *edev, struct bnxt *bp)
		edev->flags |= BNXT_EN_FLAG_VF;
	if (BNXT_ROCE_VF_RESC_CAP(bp))
		edev->flags |= BNXT_EN_FLAG_ROCE_VF_RES_MGMT;
	if (BNXT_SW_RES_LMT(bp))
		edev->flags |= BNXT_EN_FLAG_SW_RES_LMT;

	edev->chip_num = bp->chip_num;
	edev->hw_ring_stats_size = bp->hw_ring_stats_size;
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