Commit d5dc73db authored by Francois Dugast's avatar Francois Dugast Committed by Rodrigo Vivi
Browse files

drm/xe/uapi: Add missing DRM_ prefix in uAPI constants 



Most constants defined in xe_drm.h use DRM_XE_ as prefix which is
helpful to identify the name space. Make this systematic and add
this prefix where it was missing.

v2:
- fix vertical alignment of define values
- remove double DRM_ in some variables (José Roberto de Souza)

v3: Rebase

Signed-off-by: default avatarFrancois Dugast <francois.dugast@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent b646ce9c

drivers/gpu/drm/xe/xe_bo.c

+7 −7
Original line number Diff line number Diff line
@@ -209,7 +209,7 @@ static int __xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo, 


	/* The order of placements should indicate preferred location */



	if (bo->props.preferred_mem_class == XE_MEM_REGION_CLASS_SYSMEM) {

	if (bo->props.preferred_mem_class == DRM_XE_MEM_REGION_CLASS_SYSMEM) {

		try_add_system(bo, places, bo_flags, &c);

		try_add_vram(xe, bo, places, bo_flags, &c);

	} else {
@@ -1814,9 +1814,9 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, 
		return -EINVAL;



	if (XE_IOCTL_DBG(xe, args->flags &

			 ~(XE_GEM_CREATE_FLAG_DEFER_BACKING |

			   XE_GEM_CREATE_FLAG_SCANOUT |

			   XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |

			 ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |

			   DRM_XE_GEM_CREATE_FLAG_SCANOUT |

			   DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |

			   xe->info.mem_region_mask)))

		return -EINVAL;
@@ -1836,15 +1836,15 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, 
	if (XE_IOCTL_DBG(xe, args->size & ~PAGE_MASK))

		return -EINVAL;



	if (args->flags & XE_GEM_CREATE_FLAG_DEFER_BACKING)

	if (args->flags & DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING)

		bo_flags |= XE_BO_DEFER_BACKING;



	if (args->flags & XE_GEM_CREATE_FLAG_SCANOUT)

	if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)

		bo_flags |= XE_BO_SCANOUT_BIT;



	bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);



	if (args->flags & XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {

	if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {

		if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))

			return -EINVAL;

drivers/gpu/drm/xe/xe_exec_queue.c

+11 −11
Original line number Diff line number Diff line
@@ -393,7 +393,7 @@ static int exec_queue_set_acc_granularity(struct xe_device *xe, struct xe_exec_q 
	if (XE_IOCTL_DBG(xe, !xe->info.supports_usm))

		return -EINVAL;



	if (value > XE_ACC_GRANULARITY_64M)

	if (value > DRM_XE_ACC_GRANULARITY_64M)

		return -EINVAL;



	q->usm.acc_granularity = value;
@@ -406,14 +406,14 @@ typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe, 
					     u64 value, bool create);



static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {

	[XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,

	[XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,

	[XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,

	[XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,

	[XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,

	[XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,

	[XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,

	[XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,

	[DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,

	[DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,

	[DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,

	[DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,

	[DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,

	[DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,

	[DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,

	[DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,

};



static int exec_queue_user_ext_set_property(struct xe_device *xe,
@@ -445,7 +445,7 @@ typedef int (*xe_exec_queue_user_extension_fn)(struct xe_device *xe, 
					       bool create);



static const xe_exec_queue_set_property_fn exec_queue_user_extension_funcs[] = {

	[XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,

	[DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,

};



#define MAX_USER_EXTENSIONS	16
@@ -764,7 +764,7 @@ int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data, 
		return -ENOENT;



	switch (args->property) {

	case XE_EXEC_QUEUE_GET_PROPERTY_BAN:

	case DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN:

		args->value = !!(q->flags & EXEC_QUEUE_FLAG_BANNED);

		ret = 0;

		break;

drivers/gpu/drm/xe/xe_gt.c

+1 −1
Original line number Diff line number Diff line
@@ -560,7 +560,7 @@ static void xe_uevent_gt_reset_failure(struct pci_dev *pdev, u8 tile_id, u8 gt_i 
{

	char *reset_event[4];



	reset_event[0] = XE_RESET_FAILED_UEVENT "=NEEDS_RESET";

	reset_event[0] = DRM_XE_RESET_FAILED_UEVENT "=NEEDS_RESET";

	reset_event[1] = kasprintf(GFP_KERNEL, "TILE_ID=%d", tile_id);

	reset_event[2] = kasprintf(GFP_KERNEL, "GT_ID=%d", gt_id);

	reset_event[3] = NULL;

drivers/gpu/drm/xe/xe_pmu.c

+12 −12
Original line number Diff line number Diff line
@@ -17,12 +17,12 @@ static unsigned int xe_pmu_target_cpu = -1; 


static unsigned int config_gt_id(const u64 config)

{

	return config >> __XE_PMU_GT_SHIFT;

	return config >> __DRM_XE_PMU_GT_SHIFT;

}



static u64 config_counter(const u64 config)

{

	return config & ~(~0ULL << __XE_PMU_GT_SHIFT);

	return config & ~(~0ULL << __DRM_XE_PMU_GT_SHIFT);

}



static void xe_pmu_event_destroy(struct perf_event *event)
@@ -114,13 +114,13 @@ config_status(struct xe_device *xe, u64 config) 
		return -ENOENT;



	switch (config_counter(config)) {

	case XE_PMU_RENDER_GROUP_BUSY(0):

	case XE_PMU_COPY_GROUP_BUSY(0):

	case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):

	case DRM_XE_PMU_RENDER_GROUP_BUSY(0):

	case DRM_XE_PMU_COPY_GROUP_BUSY(0):

	case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):

		if (gt->info.type == XE_GT_TYPE_MEDIA)

			return -ENOENT;

		break;

	case XE_PMU_MEDIA_GROUP_BUSY(0):

	case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):

		if (!(gt->info.engine_mask & (BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0))))

			return -ENOENT;

		break;
@@ -180,10 +180,10 @@ static u64 __xe_pmu_event_read(struct perf_event *event) 
	u64 val;



	switch (config_counter(config)) {

	case XE_PMU_RENDER_GROUP_BUSY(0):

	case XE_PMU_COPY_GROUP_BUSY(0):

	case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):

	case XE_PMU_MEDIA_GROUP_BUSY(0):

	case DRM_XE_PMU_RENDER_GROUP_BUSY(0):

	case DRM_XE_PMU_COPY_GROUP_BUSY(0):

	case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):

	case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):

		val = engine_group_busyness_read(gt, config);

		break;

	default:
@@ -369,7 +369,7 @@ create_event_attributes(struct xe_pmu *pmu) 
	/* Count how many counters we will be exposing. */

	for_each_gt(gt, xe, j) {

		for (i = 0; i < ARRAY_SIZE(events); i++) {

			u64 config = ___XE_PMU_OTHER(j, events[i].counter);

			u64 config = ___DRM_XE_PMU_OTHER(j, events[i].counter);



			if (!config_status(xe, config))

				count++;
@@ -396,7 +396,7 @@ create_event_attributes(struct xe_pmu *pmu) 


	for_each_gt(gt, xe, j) {

		for (i = 0; i < ARRAY_SIZE(events); i++) {

			u64 config = ___XE_PMU_OTHER(j, events[i].counter);

			u64 config = ___DRM_XE_PMU_OTHER(j, events[i].counter);

			char *str;



			if (config_status(xe, config))

drivers/gpu/drm/xe/xe_query.c

+14 −14
Original line number Diff line number Diff line
@@ -261,7 +261,7 @@ static int query_memory_usage(struct xe_device *xe, 
		return -ENOMEM;



	man = ttm_manager_type(&xe->ttm, XE_PL_TT);

	usage->regions[0].mem_class = XE_MEM_REGION_CLASS_SYSMEM;

	usage->regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;

	usage->regions[0].instance = 0;

	usage->regions[0].min_page_size = PAGE_SIZE;

	usage->regions[0].total_size = man->size << PAGE_SHIFT;
@@ -273,7 +273,7 @@ static int query_memory_usage(struct xe_device *xe, 
		man = ttm_manager_type(&xe->ttm, i);

		if (man) {

			usage->regions[usage->num_regions].mem_class =

				XE_MEM_REGION_CLASS_VRAM;

				DRM_XE_MEM_REGION_CLASS_VRAM;

			usage->regions[usage->num_regions].instance =

				usage->num_regions;

			usage->regions[usage->num_regions].min_page_size =
@@ -305,7 +305,7 @@ static int query_memory_usage(struct xe_device *xe, 


static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)

{

	const u32 num_params = XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;

	const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;

	size_t size =

		sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);

	struct drm_xe_query_config __user *query_ptr =
@@ -324,15 +324,15 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) 
		return -ENOMEM;



	config->num_params = num_params;

	config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =

	config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =

		xe->info.devid | (xe->info.revid << 16);

	if (xe_device_get_root_tile(xe)->mem.vram.usable_size)

		config->info[XE_QUERY_CONFIG_FLAGS] =

			XE_QUERY_CONFIG_FLAGS_HAS_VRAM;

	config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT] =

		config->info[DRM_XE_QUERY_CONFIG_FLAGS] =

			DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;

	config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =

		xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;

	config->info[XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;

	config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =

	config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;

	config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =

		xe_exec_queue_device_get_max_priority(xe);



	if (copy_to_user(query_ptr, config, size)) {
@@ -368,9 +368,9 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query 
	gt_list->num_gt = xe->info.gt_count;

	for_each_gt(gt, xe, id) {

		if (xe_gt_is_media_type(gt))

			gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MEDIA;

			gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;

		else

			gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MAIN;

			gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;

		gt_list->gt_list[id].gt_id = gt->info.id;

		gt_list->gt_list[id].clock_freq = gt->info.clock_freq;

		if (!IS_DGFX(xe))
@@ -468,21 +468,21 @@ static int query_gt_topology(struct xe_device *xe, 
	for_each_gt(gt, xe, id) {

		topo.gt_id = id;



		topo.type = XE_TOPO_DSS_GEOMETRY;

		topo.type = DRM_XE_TOPO_DSS_GEOMETRY;

		query_ptr = copy_mask(query_ptr, &topo,

				      gt->fuse_topo.g_dss_mask,

				      sizeof(gt->fuse_topo.g_dss_mask));

		if (IS_ERR(query_ptr))

			return PTR_ERR(query_ptr);



		topo.type = XE_TOPO_DSS_COMPUTE;

		topo.type = DRM_XE_TOPO_DSS_COMPUTE;

		query_ptr = copy_mask(query_ptr, &topo,

				      gt->fuse_topo.c_dss_mask,

				      sizeof(gt->fuse_topo.c_dss_mask));

		if (IS_ERR(query_ptr))

			return PTR_ERR(query_ptr);



		topo.type = XE_TOPO_EU_PER_DSS;

		topo.type = DRM_XE_TOPO_EU_PER_DSS;

		query_ptr = copy_mask(query_ptr, &topo,

				      gt->fuse_topo.eu_mask_per_dss,

				      sizeof(gt->fuse_topo.eu_mask_per_dss));