Commit d5e3d8a2 authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher
Browse files

drm/amdgpu: clean up the suspend_complete 



To check the status of S3 suspend completion,
use the PM core pm_suspend_global_flags bit(1)
to detect S3 abort events. Therefore, clean up
the AMDGPU driver's private flag suspend_complete.

Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 58a8c756

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+0 −2
Original line number Diff line number Diff line
@@ -1111,8 +1111,6 @@ struct amdgpu_device { 
	bool				in_s3;

	bool				in_s4;

	bool				in_s0ix;

	/* indicate amdgpu suspension status */

	bool				suspend_complete;



	enum pp_mp1_state               mp1_state;

	struct amdgpu_doorbell_index doorbell_index;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+0 −2
Original line number Diff line number Diff line
@@ -2500,7 +2500,6 @@ static int amdgpu_pmops_suspend(struct device *dev) 
	struct drm_device *drm_dev = dev_get_drvdata(dev);

	struct amdgpu_device *adev = drm_to_adev(drm_dev);



	adev->suspend_complete = false;

	if (amdgpu_acpi_is_s0ix_active(adev))

		adev->in_s0ix = true;

	else if (amdgpu_acpi_is_s3_active(adev))
@@ -2515,7 +2514,6 @@ static int amdgpu_pmops_suspend_noirq(struct device *dev) 
	struct drm_device *drm_dev = dev_get_drvdata(dev);

	struct amdgpu_device *adev = drm_to_adev(drm_dev);



	adev->suspend_complete = true;

	if (amdgpu_acpi_should_gpu_reset(adev))

		return amdgpu_asic_reset(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+2 −2
Original line number Diff line number Diff line
@@ -3288,7 +3288,7 @@ static int gfx_v9_0_cp_gfx_start(struct amdgpu_device *adev) 
	 * confirmed that the APU gfx10/gfx11 needn't such update.

	 */

	if (adev->flags & AMD_IS_APU &&

			adev->in_s3 && !adev->suspend_complete) {

			adev->in_s3 && !pm_resume_via_firmware()) {

		DRM_INFO("Will skip the CSB packet resubmit\n");

		return 0;

	}

drivers/gpu/drm/amd/amdgpu/soc15.c

+2 −5
Original line number Diff line number Diff line
@@ -584,14 +584,11 @@ static bool soc15_need_reset_on_resume(struct amdgpu_device *adev) 
	 *    performing pm core test.

	 */

	if (adev->flags & AMD_IS_APU && adev->in_s3 &&

			!pm_resume_via_firmware()) {

		adev->suspend_complete = false;

			!pm_resume_via_firmware())

		return true;

	} else {

		adev->suspend_complete = true;

	else

		return false;

}

}



static int soc15_asic_reset(struct amdgpu_device *adev)

{

drivers/gpu/drm/amd/amdgpu/soc21.c

+3 −2
Original line number Diff line number Diff line
@@ -897,9 +897,10 @@ static bool soc21_need_reset_on_resume(struct amdgpu_device *adev) 
	/* Will reset for the following suspend abort cases.

	 * 1) Only reset dGPU side.

	 * 2) S3 suspend got aborted and TOS is active.

	 *    As for dGPU suspend abort cases the SOL value

	 *    will be kept as zero at this resume point.

	 */

	if (!(adev->flags & AMD_IS_APU) && adev->in_s3 &&

	    !adev->suspend_complete) {

	if (!(adev->flags & AMD_IS_APU) && adev->in_s3) {

		sol_reg1 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);

		msleep(100);

		sol_reg2 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);