Commit d60fbf2d authored by Lang Yu's avatar Lang Yu Committed by Alex Deucher
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drm/amdgpu: add support to powerup VPE by SMU



Powerup VPE by SMU.

Signed-off-by: default avatarLang Yu <Lang.Yu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ad3e54ab
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+1 −0
Original line number Diff line number Diff line
@@ -93,6 +93,7 @@ int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, uint32_t block
	case AMD_IP_BLOCK_TYPE_JPEG:
	case AMD_IP_BLOCK_TYPE_GMC:
	case AMD_IP_BLOCK_TYPE_ACP:
	case AMD_IP_BLOCK_TYPE_VPE:
		if (pp_funcs && pp_funcs->set_powergating_by_smu)
			ret = (pp_funcs->set_powergating_by_smu(
				(adev)->powerplay.pp_handle, block_type, gate));
+29 −0
Original line number Diff line number Diff line
@@ -279,6 +279,26 @@ static int smu_dpm_set_jpeg_enable(struct smu_context *smu,
	return ret;
}

static int smu_dpm_set_vpe_enable(struct smu_context *smu,
				   bool enable)
{
	struct smu_power_context *smu_power = &smu->smu_power;
	struct smu_power_gate *power_gate = &smu_power->power_gate;
	int ret = 0;

	if (!smu->ppt_funcs->dpm_set_vpe_enable)
		return 0;

	if (atomic_read(&power_gate->vpe_gated) ^ enable)
		return 0;

	ret = smu->ppt_funcs->dpm_set_vpe_enable(smu, enable);
	if (!ret)
		atomic_set(&power_gate->vpe_gated, !enable);

	return ret;
}

/**
 * smu_dpm_set_power_gate - power gate/ungate the specific IP block
 *
@@ -337,6 +357,12 @@ static int smu_dpm_set_power_gate(void *handle,
			dev_err(smu->adev->dev, "Failed to power %s JPEG!\n",
				gate ? "gate" : "ungate");
		break;
	case AMD_IP_BLOCK_TYPE_VPE:
		ret = smu_dpm_set_vpe_enable(smu, !gate);
		if (ret)
			dev_err(smu->adev->dev, "Failed to power %s VPE!\n",
				gate ? "gate" : "ungate");
		break;
	default:
		dev_err(smu->adev->dev, "Unsupported block type!\n");
		return -EINVAL;
@@ -1169,6 +1195,7 @@ static int smu_sw_init(void *handle)

	atomic_set(&smu->smu_power.power_gate.vcn_gated, 1);
	atomic_set(&smu->smu_power.power_gate.jpeg_gated, 1);
	atomic_set(&smu->smu_power.power_gate.vpe_gated, 1);

	smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT];
	smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0;
@@ -1521,6 +1548,7 @@ static int smu_hw_init(void *handle)
			return ret;
		smu_dpm_set_vcn_enable(smu, true);
		smu_dpm_set_jpeg_enable(smu, true);
		smu_dpm_set_vpe_enable(smu, true);
		smu_set_gfx_cgpg(smu, true);
	}

@@ -1697,6 +1725,7 @@ static int smu_hw_fini(void *handle)

	smu_dpm_set_vcn_enable(smu, false);
	smu_dpm_set_jpeg_enable(smu, false);
	smu_dpm_set_vpe_enable(smu, false);

	adev->vcn.cur_state = AMD_PG_STATE_GATE;
	adev->jpeg.cur_state = AMD_PG_STATE_GATE;
+1 −0
Original line number Diff line number Diff line
@@ -374,6 +374,7 @@ struct smu_power_gate {
	bool vce_gated;
	atomic_t vcn_gated;
	atomic_t jpeg_gated;
	atomic_t vpe_gated;
};

struct smu_power_context {