Commit d65bf6e3 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Remove all traces of FEAT_TME 



FEAT_TME has been dropped from the architecture. Retrospectively.
I'm sure someone is crying somewhere, but most of us won't.

Clean-up time.

Reviewed-by: default avatarFuad Tabba <tabba@google.com>
Tested-by: default avatarFuad Tabba <tabba@google.com>
Link: https://patch.msgid.link/20260202184329.2724080-18-maz@kernel.org


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent d784cfe6

arch/arm64/kvm/config.c

+0 −7
Original line number Diff line number Diff line
@@ -187,7 +187,6 @@ struct reg_feat_map_desc { 
#define FEAT_RME		ID_AA64PFR0_EL1, RME, IMP

#define FEAT_MPAM		ID_AA64PFR0_EL1, MPAM, 1

#define FEAT_S2FWB		ID_AA64MMFR2_EL1, FWB, IMP

#define FEAT_TME		ID_AA64ISAR0_EL1, TME, IMP

#define FEAT_TWED		ID_AA64MMFR1_EL1, TWED, IMP

#define FEAT_E2H0		ID_AA64MMFR4_EL1, E2H0, IMP

#define FEAT_SRMASK		ID_AA64MMFR4_EL1, SRMASK, IMP
@@ -991,7 +990,6 @@ static const struct reg_bits_to_feat_map hcr_feat_map[] = { 
	NEEDS_FEAT(HCR_EL2_FIEN, feat_rasv1p1),

	NEEDS_FEAT(HCR_EL2_GPF, FEAT_RME),

	NEEDS_FEAT(HCR_EL2_FWB, FEAT_S2FWB),

	NEEDS_FEAT(HCR_EL2_TME, FEAT_TME),

	NEEDS_FEAT(HCR_EL2_TWEDEL	|

		   HCR_EL2_TWEDEn,

		   FEAT_TWED),
@@ -1102,11 +1100,6 @@ static const struct reg_bits_to_feat_map sctlr_el1_feat_map[] = { 
	NEEDS_FEAT(SCTLR_EL1_EnRCTX, FEAT_SPECRES),

	NEEDS_FEAT(SCTLR_EL1_DSSBS, FEAT_SSBS),

	NEEDS_FEAT(SCTLR_EL1_TIDCP, FEAT_TIDCP1),

	NEEDS_FEAT(SCTLR_EL1_TME0	|

		   SCTLR_EL1_TME	|

		   SCTLR_EL1_TMT0	|

		   SCTLR_EL1_TMT,

		   FEAT_TME),

	NEEDS_FEAT(SCTLR_EL1_TWEDEL	|

		   SCTLR_EL1_TWEDEn,

		   FEAT_TWED),

arch/arm64/kvm/nested.c

+0 −5
Original line number Diff line number Diff line
@@ -1505,11 +1505,6 @@ u64 limit_nv_id_reg(struct kvm *kvm, u32 reg, u64 val) 
	u64 orig_val = val;



	switch (reg) {

	case SYS_ID_AA64ISAR0_EL1:

		/* Support everything but TME */

		val &= ~ID_AA64ISAR0_EL1_TME;

		break;



	case SYS_ID_AA64ISAR1_EL1:

		/* Support everything but LS64 and Spec Invalidation */

		val &= ~(ID_AA64ISAR1_EL1_LS64	|

arch/arm64/tools/sysreg

+3 −9
Original line number Diff line number Diff line
@@ -1856,10 +1856,7 @@ UnsignedEnum 31:28 RDM 
	0b0000	NI

	0b0001	IMP

EndEnum

UnsignedEnum	27:24	TME

	0b0000	NI

	0b0001	IMP

EndEnum

Res0	27:24

UnsignedEnum	23:20	ATOMIC

	0b0000	NI

	0b0010	IMP
@@ -2432,10 +2429,7 @@ Field 57 EPAN 
Field	56	EnALS

Field	55	EnAS0

Field	54	EnASR

Field	53	TME

Field	52	TME0

Field	51	TMT

Field	50	TMT0

Res0	53:50

Field	49:46	TWEDEL

Field	45	TWEDEn

Field	44	DSSBS
@@ -3840,7 +3834,7 @@ Field 43 NV1 
Field	42	NV

Field	41	API

Field	40	APK

Field	39	TME

Res0	39

Field	38	MIOCNCE

Field	37	TEA

Field	36	TERR

tools/perf/Documentation/perf-arm-spe.txt

+0 −1
Original line number Diff line number Diff line
@@ -176,7 +176,6 @@ and inv_event_filter are: 
  bit 10    - Remote access (FEAT_SPEv1p4)

  bit 11    - Misaligned access (FEAT_SPEv1p1)

  bit 12-15 - IMPLEMENTATION DEFINED events (when implemented)

  bit 16    - Transaction (FEAT_TME)

  bit 17    - Partial or empty SME or SVE predicate (FEAT_SPEv1p1)

  bit 18    - Empty SME or SVE predicate (FEAT_SPEv1p1)

  bit 19    - L2D access (FEAT_SPEv1p4)

tools/testing/selftests/kvm/arm64/set_id_regs.c

+0 −1
Original line number Diff line number Diff line
@@ -91,7 +91,6 @@ static const struct reg_ftr_bits ftr_id_aa64isar0_el1[] = { 
	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ISAR0_EL1, SM3, 0),

	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ISAR0_EL1, SHA3, 0),

	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ISAR0_EL1, RDM, 0),

	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ISAR0_EL1, TME, 0),

	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ISAR0_EL1, ATOMIC, 0),

	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ISAR0_EL1, CRC32, 0),

	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ISAR0_EL1, SHA2, 0),