Commit d7133797 authored by Victor Shih's avatar Victor Shih Committed by Ulf Hansson
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mmc: sdhci-pci-gli: A workaround to allow GL9750 to enter ASPM L1.2 



When GL9750 enters ASPM L1 sub-states, it will stay at L1.1 and will not
enter L1.2. The workaround is to toggle PM state to allow GL9750 to enter
ASPM L1.2.

Signed-off-by: default avatarVictor Shih <victor.shih@genesyslogic.com.tw>
Link: https://lore.kernel.org/r/20230912091710.7797-1-victorshihgli@gmail.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 3b7eee6a

drivers/mmc/host/sdhci-pci-gli.c

+14 −0
Original line number Diff line number Diff line
@@ -25,6 +25,9 @@ 
#define   GLI_9750_WT_EN_ON	    0x1

#define   GLI_9750_WT_EN_OFF	    0x0



#define PCI_GLI_9750_PM_CTRL	0xFC

#define   PCI_GLI_9750_PM_STATE	  GENMASK(1, 0)



#define SDHCI_GLI_9750_CFG2          0x848

#define   SDHCI_GLI_9750_CFG2_L1DLY    GENMASK(28, 24)

#define   GLI_9750_CFG2_L1DLY_VALUE    0x1F
@@ -536,8 +539,12 @@ static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock) 


static void gl9750_hw_setting(struct sdhci_host *host)

{

	struct sdhci_pci_slot *slot = sdhci_priv(host);

	struct pci_dev *pdev;

	u32 value;



	pdev = slot->chip->pdev;



	gl9750_wt_on(host);



	value = sdhci_readl(host, SDHCI_GLI_9750_CFG2);
@@ -547,6 +554,13 @@ static void gl9750_hw_setting(struct sdhci_host *host) 
			    GLI_9750_CFG2_L1DLY_VALUE);

	sdhci_writel(host, value, SDHCI_GLI_9750_CFG2);



	/* toggle PM state to allow GL9750 to enter ASPM L1.2 */

	pci_read_config_dword(pdev, PCI_GLI_9750_PM_CTRL, &value);

	value |= PCI_GLI_9750_PM_STATE;

	pci_write_config_dword(pdev, PCI_GLI_9750_PM_CTRL, value);

	value &= ~PCI_GLI_9750_PM_STATE;

	pci_write_config_dword(pdev, PCI_GLI_9750_PM_CTRL, value);



	gl9750_wt_off(host);

}