Commit d719915a authored by Chintan Vankar's avatar Chintan Vankar Committed by Vinod Koul
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phy: ti: gmii-sel: Enable SGMII mode for J784S4 



TI's J784S4 SoC supports SGMII mode with the CPSW9G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the list of the
corresponding extra_modes member.

Signed-off-by: default avatarChintan Vankar <c-vankar@ti.com>
Reviewed-by: default avatarRoger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20231221102956.754617-1-c-vankar@ti.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 2daa9555

drivers/phy/ti/phy-gmii-sel.c

+1 −1
Original line number Diff line number Diff line
@@ -247,7 +247,7 @@ static const 
struct phy_gmii_sel_soc_data phy_gmii_sel_cpsw9g_soc_j784s4 = {

	.use_of_data = true,

	.regfields = phy_gmii_sel_fields_am654,

	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) |

	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |

		       BIT(PHY_INTERFACE_MODE_USXGMII),

	.num_ports = 8,

	.num_qsgmii_main_ports = 2,