Commit d7425f3c authored by Diogo Silva's avatar Diogo Silva Committed by Shawn Guo
Browse files

arm64: dts: imx8: Fix lvds0 device tree 



Some clock output names on lvds0 device tree were duplicated from mipi1,
which caused an -EEXIST when registering these clocks during probe.

Fixes: 0fba24b3 ("arm64: dts: imx8: add basic lvds0 and lvds1 subsystem")
Signed-off-by: default avatarDiogo Silva <diogompaissilva@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 409dc519

arch/arm64/boot/dts/freescale/imx8-ss-lvds0.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ qm_lvds0_lis_lpcg: qxp_mipi1_lis_lpcg: clock-controller@56243000 { 
		compatible = "fsl,imx8qxp-lpcg";

		reg = <0x56243000 0x4>;

		#clock-cells = <1>;

		clock-output-names = "mipi1_lis_lpcg_ipg_clk";

		clock-output-names = "lvds0_lis_lpcg_ipg_clk";

		power-domains = <&pd IMX_SC_R_MIPI_1>;

	};
@@ -22,9 +22,9 @@ qm_lvds0_pwm_lpcg: qxp_mipi1_pwm_lpcg: clock-controller@5624300c { 
		compatible = "fsl,imx8qxp-lpcg";

		reg = <0x5624300c 0x4>;

		#clock-cells = <1>;

		clock-output-names = "mipi1_pwm_lpcg_clk",

				     "mipi1_pwm_lpcg_ipg_clk",

				     "mipi1_pwm_lpcg_32k_clk";

		clock-output-names = "lvds0_pwm_lpcg_clk",

				     "lvds0_pwm_lpcg_ipg_clk",

				     "lvds0_pwm_lpcg_32k_clk";

		power-domains = <&pd IMX_SC_R_MIPI_1_PWM_0>;

	};
@@ -32,8 +32,8 @@ qm_lvds0_i2c0_lpcg: qxp_mipi1_i2c0_lpcg: clock-controller@56243010 { 
		compatible = "fsl,imx8qxp-lpcg";

		reg = <0x56243010 0x4>;

		#clock-cells = <1>;

		clock-output-names = "mipi1_i2c0_lpcg_clk",

				     "mipi1_i2c0_lpcg_ipg_clk";

		clock-output-names = "lvds0_i2c0_lpcg_clk",

				     "lvds0_i2c0_lpcg_ipg_clk";

		power-domains = <&pd IMX_SC_R_MIPI_1_I2C_0>;

	};