Commit d7dc3ccb authored Oct 09, 2007 by Roland Dreier

IB/mlx4: Fix up SRQ limit_watermark endianness



mlx4_srq_query() returns a big-endian 16-bit value through an int *,
which screws up sparse checking.  Fix this so that a CPU-endian value
is returned.

Signed-off-by: Roland Dreier <rolandd@cisco.com>

parent ca6de177

drivers/infiniband/hw/mlx4/srq.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -251,7 +251,7 @@ int mlx4_ib_query_srq(struct ib_srq ibsrq, struct ib_srq_attr srq_attr)
		if (ret)
		return ret;

		srq_attr->srq_limit = be16_to_cpu(limit_watermark);
		srq_attr->srq_limit = limit_watermark;
		srq_attr->max_wr = srq->msrq.max - 1;
		srq_attr->max_sge = srq->msrq.max_gs;

drivers/net/mlx4/srq.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -227,7 +227,7 @@ int mlx4_srq_query(struct mlx4_dev dev, struct mlx4_srq srq, int *limit_waterm
		err = mlx4_QUERY_SRQ(dev, mailbox, srq->srqn);
		if (err)
		goto err_out;
		*limit_watermark = srq_context->limit_watermark;
		*limit_watermark = be16_to_cpu(srq_context->limit_watermark);

		err_out:
		mlx4_free_cmd_mailbox(dev, mailbox);