Commit d7eafed3 authored by Connor Abbott's avatar Connor Abbott Committed by Rob Clark
Browse files

drm/msm: Expose expanded UBWC config uapi 



This adds extra parameters that affect UBWC tiling that will be used by
the Mesa implementation of VK_EXT_host_image_copy.

Signed-off-by: default avatarConnor Abbott <cwabbott0@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/607401/


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent b874638b

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+6 −0
Original line number Diff line number Diff line
@@ -379,6 +379,12 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx, 
	case MSM_PARAM_RAYTRACING:

		*value = adreno_gpu->has_ray_tracing;

		return 0;

	case MSM_PARAM_UBWC_SWIZZLE:

		*value = adreno_gpu->ubwc_config.ubwc_swizzle;

		return 0;

	case MSM_PARAM_MACROTILE_MODE:

		*value = adreno_gpu->ubwc_config.macrotile_mode;

		return 0;

	default:

		DBG("%s: invalid param: %u", gpu->name, param);

		return -EINVAL;

include/uapi/drm/msm_drm.h

+2 −0
Original line number Diff line number Diff line
@@ -88,6 +88,8 @@ struct drm_msm_timespec { 
#define MSM_PARAM_VA_SIZE    0x0f  /* RO: size of valid GPU iova range (bytes) */

#define MSM_PARAM_HIGHEST_BANK_BIT 0x10 /* RO */

#define MSM_PARAM_RAYTRACING 0x11 /* RO */

#define MSM_PARAM_UBWC_SWIZZLE 0x12 /* RO */

#define MSM_PARAM_MACROTILE_MODE 0x13 /* RO */



/* For backwards compat.  The original support for preemption was based on

 * a single ring per priority level so # of priority levels equals the #